Searched +full:reg +full:- +full:names (Results 1076 – 1100 of 2993) sorted by relevance
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/linux-6.15/arch/arm/boot/dts/microchip/ |
D | at91-sama5d3_eds.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * at91-sama5d3_eds.dts - Device Tree file for the SAMA5D3 Ethernet 10 /dts-v1/; 15 compatible = "microchip,sama5d3-eds", "atmel,sama5d36", 19 stdout-path = "serial0:115200n8"; 22 gpio-keys { 23 compatible = "gpio-keys"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pinctrl_key_gpio>; 28 button-3 { [all …]
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/linux-6.15/arch/arm/boot/dts/nxp/vf/ |
D | vf610-zii-dev-rev-b.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "vf610-zii-dev.dtsi" 11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610"; 13 mdio-mux { 14 compatible = "mdio-mux-gpio"; 15 pinctrl-0 = <&pinctrl_mdio_mux>; 16 pinctrl-names = "default"; 21 mdio-parent-bus = <&mdio1>; 22 #address-cells = <1>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/iio/adc/ |
D | amlogic,meson-saradc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 18 - const: amlogic,meson-saradc 19 - items: 20 - enum: 21 - amlogic,meson8-saradc 22 - amlogic,meson8b-saradc [all …]
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/linux-6.15/arch/arm64/boot/dts/freescale/ |
D | imx93-11x11-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/usb/pd.h> 13 compatible = "fsl,imx93-11x11-evk", "fsl,imx93"; 16 stdout-path = &lpuart1; 19 reserved-memory { 20 #address-cells = <2>; 21 #size-cells = <2>; 25 compatible = "shared-dma-pool"; 27 alloc-ranges = <0 0x80000000 0 0x40000000>; [all …]
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/linux-6.15/arch/arm/boot/dts/marvell/ |
D | armada-370-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F6710-BP-DDR3) 9 * Gregory CLEMENT <gregory.clement@free-electrons.com> 10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 22 /dts-v1/; 23 #include "armada-370.dtsi" 27 compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp"; 30 stdout-path = "serial0:115200n8"; 35 reg = <0x00000000 0x40000000>; /* 1 GB */ [all …]
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D | armada-385-db-ap.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * (DB-88F6820-AP) 11 /dts-v1/; 12 #include "armada-385.dtsi" 14 #include <dt-bindings/gpio/gpio.h> 18 compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380"; 21 stdout-path = "serial1:115200n8"; 26 reg = <0x00000000 0x80000000>; /* 2GB */ 36 internal-regs { 38 pinctrl-names = "default"; [all …]
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/linux-6.15/arch/arm64/boot/dts/marvell/ |
D | cn9132-sr-cex7.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 7 #include <dt-bindings/gpio/gpio.h> 21 #include "armada-cp115.dtsi" 43 #include "armada-cp115.dtsi" 55 compatible = "solidrun,cn9132-sr-cex7", "marvell,cn9130"; 75 stdout-path = "serial0:115200n8"; 78 fan: pwm-fan { 79 compatible = "pwm-fan"; 80 cooling-levels = <0 51 102 153 204 255>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/usb/ |
D | marvell,pxau2o-ehci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 14 - $ref: usb-hcd.yaml# 18 const: marvell,pxau2o-ehci 20 reg: 29 clock-names: 35 phy-names: [all …]
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D | nvidia,tegra210-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 18 const: nvidia,tegra210-xusb 20 reg: 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers [all …]
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/linux-6.15/Documentation/devicetree/bindings/mmc/ |
D | hisilicon,hi3798cv200-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Yang Xiwen <forbidden405@outlook.com> 15 - hisilicon,hi3798cv200-dw-mshc 16 - hisilicon,hi3798mv200-dw-mshc 18 reg: 26 - description: bus interface unit clock 27 - description: card interface unit clock [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | intel,combo-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/intel,combo-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dilip Kota <eswara.kota@linux.intel.com> 18 pattern: "combophy(@.*|-([0-9]|[1-9][0-9]+))?$" 22 - const: intel,combophy-lgm 23 - const: intel,combo-phy 28 reg: 30 - description: ComboPhy core registers [all …]
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D | phy-rockchip-naneng-combphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,rk3562-naneng-combphy 16 - rockchip,rk3568-naneng-combphy 17 - rockchip,rk3576-naneng-combphy 18 - rockchip,rk3588-naneng-combphy 20 reg: [all …]
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/linux-6.15/arch/arm64/boot/dts/amlogic/ |
D | amlogic-c3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> [all …]
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/linux-6.15/arch/arm/boot/dts/nxp/imx/ |
D | imx6qdl-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2014-2022 Toradex 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pwm/pwm.h> 18 /delete-property/ mmc3; 24 reg = <0x10000000 0>; 28 compatible = "pwm-backlight"; 29 brightness-levels = <0 45 63 88 119 158 203 255>; 30 default-brightness-level = <4>; 31 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; [all …]
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D | imx6q-dmo-edmqmx6.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 12 model = "Data Modul eDM-QMX6 Board"; 13 compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; 16 stdout-path = &uart2; 22 stmpe-i2c0 = &stmpe1; 23 stmpe-i2c1 = &stmpe2; 28 reg = <0x10000000 0x80000000>; 31 reg_3p3v: regulator-3p3v { [all …]
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D | imx6qdl-pico.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 9 #include <dt-bindings/gpio/gpio.h> 13 stdout-path = &uart1; 16 reg_2p5v: regulator-2p5v { 17 compatible = "regulator-fixed"; 18 regulator-name = "2P5V"; 19 regulator-min-microvolt = <2500000>; 20 regulator-max-microvolt = <2500000>; 21 regulator-always-on; 24 reg_3p3v: regulator-3p3v { [all …]
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/linux-6.15/arch/arm64/boot/dts/qcom/ |
D | sc7180-acer-aspire1.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/sound/qcom,q6asm.h> 7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 14 /delete-node/ &tz_mem; 15 /delete-node/ &ipa_fw_mem; 20 chassis-type = "laptop"; 30 stdout-path = "serial0:115200n8"; 33 reserved-memory { [all …]
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/linux-6.15/Documentation/devicetree/bindings/display/ |
D | allwinner,sun8i-a83t-hdmi-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-hdmi-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun8i-a83t-hdmi-phy 20 - allwinner,sun8i-h3-hdmi-phy 21 - allwinner,sun8i-r40-hdmi-phy [all …]
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/linux-6.15/Documentation/devicetree/bindings/media/ |
D | samsung,s5p-mfc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/media/samsung,s5p-mfc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Szyprowski <m.szyprowski@samsung.com> 11 - Aakarsh Jain <aakarsh.jain@samsung.com> 20 - enum: 21 - samsung,exynos5433-mfc # Exynos5433 22 - samsung,mfc-v5 # Exynos4 23 - samsung,mfc-v6 # Exynos5 [all …]
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/linux-6.15/arch/arm64/boot/dts/mediatek/ |
D | mt8395-genio-1200-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 16 #include <dt-bindings/spmi/spmi.h> 17 #include <dt-bindings/usb/pd.h> 20 model = "MediaTek Genio 1200 EVK-P1V2-EMMC"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/display/ti/ |
D | ti,dra7-dss.txt | 4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic 8 -------- 11 - compatible: "ti,dra7-dss" 12 - reg: address and length of the register spaces for 'dss' 13 - ti,hwmods: "dss_core" 14 - clocks: handle to fclk 15 - clock-names: "fck" 16 - syscon: phandle to control module core syscon node 23 - reg: address and length of the register spaces for 'pll1_clkctrl', 25 - clocks: handle to video1 pll clock and video2 pll clock [all …]
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/linux-6.15/arch/arm/boot/dts/ti/keystone/ |
D | keystone-k2hk-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "ti,keystone-navigator-qmss"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 queue-range = <0 0x4000>; 20 #address-cells = <1>; 21 #size-cells = <1>; 24 managed-queues = <0 0x2000>; [all …]
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/linux-6.15/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mm-vpu-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM VPU blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mm-vpu-blk-ctrl 21 - const: syscon 23 reg: [all …]
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/linux-6.15/Documentation/devicetree/bindings/reset/ |
D | nxp,lpc1850-rgu.txt | 8 - compatible: Should be "nxp,lpc1850-rgu" 9 - reg: register base and length 10 - clocks: phandle and clock specifier to RGU clocks 11 - clock-names: should contain "delay" and "reg" 12 - #reset-cells: should be 1 20 12 ARM Cortex-M0 subsystem core (LPC43xx only) 56 56 ARM Cortex-M0 application core (LPC4370 only) 59 60 ADCHS (12-bit ADC) (LPC4370 only) 65 rgu: reset-controller@40053000 { 66 compatible = "nxp,lpc1850-rgu"; [all …]
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/linux-6.15/arch/arm/boot/dts/aspeed/ |
D | aspeed-bmc-opp-mowgli.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /dts-v1/; 3 #include "aspeed-g5.dtsi" 4 #include <dt-bindings/gpio/aspeed-gpio.h> 5 #include <dt-bindings/leds/leds-pca955x.h> 9 compatible = "ibm,mowgli-bmc", "aspeed,ast2500"; 13 stdout-path = &uart5; 18 reg = <0x80000000 0x20000000>; 21 reserved-memory { 22 #address-cells = <1>; [all …]
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