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/linux-5.10/Documentation/devicetree/bindings/spi/
Dqcom,spi-qcom-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm Quad Serial Peripheral Interface (QSPI)
11 - Mukesh Savaliya <msavaliy@codeaurora.org>
12 - Akash Asthana <akashast@codeaurora.org>
14 description: The QSPI controller allows SPI protocol communication in single,
19 - $ref: /spi/spi-controller.yaml#
24 - const: qcom,sdm845-qspi
[all …]
/linux-5.10/arch/arm/boot/dts/
Dsocfpga_arria10_socdk_qspi.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 &qspi {
13 #address-cells = <1>;
14 #size-cells = <1>;
17 spi-max-frequency = <100000000>;
19 m25p,fast-read;
20 cdns,page-size = <256>;
21 cdns,block-size = <16>;
22 cdns,read-delay = <3>;
[all …]
Dam574x-idk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
10 #include "dra7-mmc-iodelay.dtsi"
11 #include "dra76x-mmc-iodelay.dtsi"
12 #include "am572x-idk-common.dtsi"
16 compatible = "ti,am5748-idk", "ti,am5748", "ti,dra762", "ti,dra7";
19 &qspi {
20 spi-max-frequency = <96000000>;
22 spi-max-frequency = <96000000>;
[all …]
Ddra72-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-ipu-dsp-common.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/ti-dra7-atl.h>
13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
20 stdout-path = &uart1;
23 evm_12v0: fixedregulator-evm12v0 {
25 compatible = "regulator-fixed";
[all …]
Dkeystone-k2g-ice.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
9 #include "keystone-k2g.dtsi"
10 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
21 reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
26 dsp_common_memory: dsp-common-memory@81f800000 {
[all …]
Dr8a7792-wheat.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
24 stdout-path = "serial0:115200n8";
32 d3_3v: regulator-3v3 {
33 compatible = "regulator-fixed";
34 regulator-name = "D3.3V";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
[all …]
Dbcm53340-ubnt-unifi-switch8.dts9 /dts-v1/;
11 #include "bcm-hr2.dtsi"
14 compatible = "ubnt,unifi-switch8", "brcm,bcm53342", "brcm,hr2";
33 &qspi {
35 bspi-sel = <0>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 spi-max-frequency = <12500000>;
43 spi-cpol;
44 spi-cpha;
[all …]
Dam437x-idk-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include <dt-bindings/pinctrl/am43xx.h>
10 #include <dt-bindings/pwm/pwm.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
19 stdout-path = &uart0;
22 v24_0d: fixed-regulator-v24_0d {
[all …]
Dat91-sam9x60ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sam9x60ek.dts - Device Tree file for Microchip SAM9X60-EK board
9 /dts-v1/;
13 model = "Microchip SAM9X60-EK";
23 stdout-path = "serial0:115200n8";
28 clock-frequency = <32768>;
32 clock-frequency = <24000000>;
37 compatible = "simple-bus";
38 #address-cells = <1>;
39 #size-cells = <0>;
[all …]
Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
44 reg_3p3v: regulator-3p3v {
45 compatible = "regulator-fixed";
46 regulator-name = "fixed-3.3V";
[all …]
Dr8a7790-stout.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
32 compatible = "gpio-leds";
47 fixedregulator3v3: regulator-3v3 {
48 compatible = "regulator-fixed";
49 regulator-name = "fixed-3.3V";
50 regulator-min-microvolt = <3300000>;
[all …]
Dkeystone-k2g-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
9 #include "keystone-k2g.dtsi"
12 compatible = "ti,k2g-evm", "ti,k2g", "ti,keystone";
20 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 dsp_common_memory: dsp-common-memory@81f800000 {
26 compatible = "shared-dma-pool";
[all …]
Dat91-sama5d2_icp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board
11 /dts-v1/;
13 #include "sama5d2-pinfunc.h"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
18 model = "Microchip SAMA5D2-ICP";
19 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
31 stdout-path = "serial0:115200n8";
36 clock-frequency = <32768>;
[all …]
Dr8a7794-alt.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
34 d3_3v: regulator-d3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "D3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 regulator-boot-on;
[all …]
Dr8a7791-porter.dts1 // SPDX-License-Identifier: GPL-2.0
9 * SSI-AK4642
11 * JP3: 2-1: AK4642
12 * 2-3: ADV7511
19 /dts-v1/;
21 #include <dt-bindings/gpio/gpio.h>
35 stdout-path = "serial0:115200n8";
48 vcc_sdhi0: regulator-vcc-sdhi0 {
49 compatible = "regulator-fixed";
51 regulator-name = "SDHI0 Vcc";
[all …]
/linux-5.10/arch/mips/boot/dts/brcm/
Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm97358svmb.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 /include/ "bcm97xxx-nand-cs1-bch4.dtsi"
18 stdout-path = &uart0;
78 &qspi {
84 spi-max-frequency = <40000000>;
85 spi-cpol;
86 spi-cpha;
87 use-bspi;
88 m25p,fast-read;
[all …]
Dbcm97360svmb.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
17 stdout-path = &uart0;
81 &qspi {
87 spi-max-frequency = <40000000>;
88 spi-cpol;
89 spi-cpha;
90 use-bspi;
91 m25p,fast-read;
94 compatible = "fixed-partitions";
[all …]
Dbcm97425svmb.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 /include/ "bcm97xxx-nand-cs1-bch24.dtsi"
20 stdout-path = &uart0;
116 &qspi {
122 spi-max-frequency = <40000000>;
123 spi-cpol;
124 spi-cpha;
125 use-bspi;
126 m25p,fast-read;
[all …]
/linux-5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls1012a-frwy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "fsl-ls1012a.dtsi"
16 compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
27 &qspi {
31 compatible = "jedec,spi-nor";
32 #address-cells = <1>;
33 #size-cells = <1>;
34 m25p,fast-read;
35 spi-max-frequency = <50000000>;
[all …]
Dfsl-ls1012a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
22 sd-uhs-sdr104;
23 sd-uhs-sdr50;
24 sd-uhs-sdr25;
25 sd-uhs-sdr12;
30 mmc-hs200-1_8v;
38 &qspi {
[all …]
Dfsl-ls1012a-frdm.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
16 sys_mclk: clock-mclk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <25000000>;
22 reg_1p8v: regulator-1p8v {
23 compatible = "regulator-fixed";
[all …]
Dfsl-ls1088a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
23 i2c-switch@77 {
26 #address-cells = <1>;
27 #size-cells = <0>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 shunt-resistor = <1000>;
[all …]
Dfsl-ls1012a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "fsl-ls1012a.dtsi"
14 compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
16 sys_mclk: clock-mclk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <24576000>;
22 reg_3p3v: regulator-3p3v {
23 compatible = "regulator-fixed";
[all …]
/linux-5.10/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
111 supports spi-mem interface.
181 this code to manage the per-word or per-transfer accesses to the
210 Cadence QSPI is a specialized controller for connecting an SPI
211 Flash over 1/2/4-bit wide bus. Enable this option if you have a
212 device with a Cadence QSPI controller and want to access the
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