/linux-6.15/drivers/spi/ |
D | spi-offload-trigger-pwm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Generic PWM trigger for SPI offload. 16 #include <linux/pwm.h> 24 struct pwm_device *pwm; member 27 static bool spi_offload_trigger_pwm_match(struct spi_offload_trigger *trigger, in spi_offload_trigger_pwm_match() argument 37 static int spi_offload_trigger_pwm_validate(struct spi_offload_trigger *trigger, in spi_offload_trigger_pwm_validate() argument 40 struct spi_offload_trigger_pwm_state *st = spi_offload_trigger_get_priv(trigger); in spi_offload_trigger_pwm_validate() 41 struct spi_offload_trigger_periodic *periodic = &config->periodic; in spi_offload_trigger_pwm_validate() 45 if (config->type != SPI_OFFLOAD_TRIGGER_PERIODIC) in spi_offload_trigger_pwm_validate() 46 return -EINVAL; in spi_offload_trigger_pwm_validate() [all …]
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/linux-6.15/Documentation/devicetree/bindings/trigger-source/ |
D | pwm-trigger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/trigger-source/pwm-trigger.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic trigger source using PWM 9 description: Remaps a PWM channel as a trigger source. 12 - David Lechner <dlechner@baylibre.com> 16 const: pwm-trigger 18 '#trigger-source-cells': 25 - compatible [all …]
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/linux-6.15/Documentation/devicetree/bindings/mfd/ |
D | st,stm32-lptimer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Low-Power Timers 10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several 12 - PWM output (with programmable prescaler, configurable polarity) 13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT) 14 - Several counter modes: 15 - quadrature encoder to detect angular position and direction of rotary [all …]
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D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 This hardware block provides 3 types of timer along with PWM functionality: 11 - advanced-control timers consist of a 16-bit auto-reload counter driven 12 by a programmable prescaler, break input feature, PWM outputs and 13 complementary PWM outputs channels. 14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter 15 driven by a programmable prescaler and PWM outputs. [all …]
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/linux-6.15/drivers/pwm/ |
D | pwm-bcm-kona.c | 1 // SPDX-License-Identifier: GPL-2.0-only 13 #include <linux/pwm.h> 18 * The Kona PWM has some unusual characteristics. Here are the main points. 24 * a subsequent rising edge of the trigger bit. 26 * 3) If the smooth bit and trigger bit are both low, the output is a constant 29 * 4) If the smooth bit is set on the rising edge of the trigger bit, output 34 * 5) When the external clock that feeds the PWM is disabled, output is pegged 69 * Clear trigger bit but set smooth bit to maintain old output. 74 unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings() 78 writel(value, kp->base + PWM_CONTROL_OFFSET); in kona_pwmc_prepare_for_settings() [all …]
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D | pwm-atmel-tcb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 21 #include <linux/pwm.h> 36 unsigned div; /* PWM clock divider */ 37 unsigned duty; /* PWM duty expressed in clk cycles */ 38 unsigned period; /* PWM period expressed in clk cycles */ 69 struct pwm_device *pwm) in atmel_tcb_pwm_request() argument 72 struct atmel_tcb_pwm_device *tcbpwm = &tcbpwmc->pwms[pwm->hwpwm]; in atmel_tcb_pwm_request() 76 ret = clk_prepare_enable(tcbpwmc->clk); in atmel_tcb_pwm_request() 80 tcbpwm->duty = 0; in atmel_tcb_pwm_request() 81 tcbpwm->period = 0; in atmel_tcb_pwm_request() [all …]
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/linux-6.15/arch/arm/boot/dts/microchip/ |
D | at91-kizbox.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-kizbox.dts - Device Tree file for Overkiz Kizbox board 5 * Copyright (C) 2012-2014 Boris BREZILLON <b.brezillon@overkiz.com> 6 * 2014-2015 Gaël PORTAY <g.portay@overkiz.com> 8 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 18 stdout-path = &dbgu; 27 clock-frequency = <18432000>; 31 gpio-keys { 32 compatible = "gpio-keys"; [all …]
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D | at91-kizboxmini-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * at91-kizboxmini.dts - Device Tree file for Overkiz Kizbox mini board 5 * Copyright (C) 2014-2018 Overkiz SAS 16 stdout-path = &dbgu; 25 clock-frequency = <12000000>; 29 clock-frequency = <32768>; 38 compatible = "gpio-keys"; 40 key-prog { 44 wakeup-source; 47 key-reset { [all …]
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D | at91-kizbox2-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * at91-kizbox2_common.dtsi - Device Tree Include file for 6 * Copyright (C) 2014-2018 Overkiz SAS 17 stdout-path = &dbgu; 26 clock-frequency = <32768>; 30 clock-frequency = <12000000>; 34 gpio-keys { 35 compatible = "gpio-keys"; 37 button-prog { 41 wakeup-source; [all …]
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/linux-6.15/arch/arm/boot/dts/st/ |
D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 52 clk_hse: clk-hse { 53 #clock-cells = <0>; 54 compatible = "fixed-clock"; [all …]
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D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "../armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
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D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp13-clks.h> 8 #include <dt-bindings/reset/stm32mp13-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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/linux-6.15/arch/arm/boot/dts/samsung/ |
D | exynos54xx-odroidxu-leds.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/leds/common.h> 15 led-controller-1 { 16 compatible = "pwm-leds"; 18 led-1 { 22 pwms = <&pwm 1 2000000 0>; 23 pwm-names = "pwm1"; 28 max-brightness = <127>; 29 linux,default-trigger = "mmc0"; [all …]
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D | exynos5422-odroidxu4.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd. 11 /dts-v1/; 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/sound/samsung-i2s.h> 14 #include "exynos5422-odroidxu3-common.dtsi" 18 compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \ 21 led-controller { 22 compatible = "pwm-leds"; 24 led-1 { [all …]
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/linux-6.15/Documentation/iio/ |
D | ad7606.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only 24 ---------------- 30 -------------------- 34 platform in the device tree (with no io-backends node defined, see below). 36 IIO-backend mode 37 ---------------- 41 The backend mode is enabled when through the definition of the "io-backends" 44 The reference configuration for the current implementation of IIO-backend mode 46 https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl 48 This implementation embeds an IIO-backend compatible IP (adi-axi-adc) and a PWM [all …]
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/linux-6.15/arch/arm/boot/dts/marvell/ |
D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
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/linux-6.15/Documentation/leds/ |
D | leds-qcom-lpg.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 ----------- 11 number of PWM channels, a programmable pattern lookup table and a RGB LED 15 individual LEDs, grouped together as RGB LEDs or otherwise be accessed as PWM 16 channels. The output of each PWM channel is routed to other hardware 19 The each PWM channel can operate with a period between 27us and 384 seconds and 27 The pattern for a channel can be programmed using the "pattern" trigger, using 31 -------------------------------- 35 The pattern is a series of brightness and hold-time pairs, with the hold-time 39 transitions expected by the leds-trigger-pattern format, each entry in the [all …]
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/linux-6.15/arch/arm/boot/dts/rockchip/ |
D | rv1109-relfor-saib.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/input/input.h> 16 gpio-keys { 17 compatible = "gpio-keys"; 23 linux,input-type = <1>; 27 ir_receiver: ir-receiver { 28 compatible = "gpio-ir-receiver"; 30 pinctrl-names = "default"; [all …]
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/linux-6.15/Documentation/devicetree/bindings/pinctrl/ |
D | starfive,jh7110-aon-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd. 14 schmitt trigger etc. 15 Some peripherals such as PWM have their I/O go through the 4 "GPIOs". 18 - Jianlong Huang <jianlong.huang@starfivetech.com> 22 const: starfive,jh7110-aon-pinctrl 33 interrupt-controller: true [all …]
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/linux-6.15/include/soc/at91/ |
D | atmel_tcb.h | 17 * Many 32-bit Atmel SOCs include one or more TC blocks, each of which holds 18 * three general-purpose 16-bit timers. These timers share one register bank. 23 * clocks or clock gates, and per-timer TIOA and TIOB signals used for PWM 37 * struct atmel_tcb_config - SoC data for a Timer/Counter Block 50 * struct atmel_tc - information about a Timer/Counter Block 80 /* platform-specific ATMEL_TC_TIMER_CLOCKx divisors (0 means 32KiHz) */ 85 * Two registers have block-wide controls. These are: configuring the three 119 * when it's not "external") is silicon-specific. AT91 platforms use one 120 * set of definitions; AVR32 platforms use a different set. Don't hard-wire 126 * generation mode (including PWM) or "capture" mode (to time events). In [all …]
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/linux-6.15/arch/arm/boot/dts/broadcom/ |
D | bcm-ns.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> 6 #include <dt-bindings/clock/bcm-nsp.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; [all …]
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/linux-6.15/drivers/leds/ |
D | leds-cht-wcove.c | 1 // SPDX-License-Identifier: GPL-2.0 55 u16 pwm; member 65 unsigned int pwm; member 86 .pwm = CHT_WC_LED1_PWM, 94 .pwm = CHT_WC_LED2_PWM, 112 mutex_lock(&led->mutex); in cht_wc_leds_brightness_set() 115 ret = regmap_update_bits(led->regmap, led->regs->ctrl, in cht_wc_leds_brightness_set() 116 led->regs->on_off_mask, led->regs->off_val); in cht_wc_leds_brightness_set() 118 dev_err(cdev->dev, "Failed to turn off: %d\n", ret); in cht_wc_leds_brightness_set() 123 ret = regmap_update_bits(led->regmap, led->regs->fsm, in cht_wc_leds_brightness_set() [all …]
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/linux-6.15/Documentation/ABI/testing/ |
D | sysfs-bus-iio-adc-stm32 | 5 The STM32 ADC can be configured to use external trigger sources 6 (e.g. timers, pwm or exti gpio). Then, it can be tuned to start 7 conversions on external trigger by either: 9 - "rising-edge" 10 - "falling-edge" 11 - "both-edges". 13 Reading returns current trigger polarity. 15 Writing value before enabling conversions sets trigger polarity.
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