Home
last modified time | relevance | path

Searched full:privilege (Results 1 – 25 of 65) sorted by relevance

123

/qemu/docs/system/
H A Dsecurity.rst78 Principle of Least Privilege
81 The principle of least privilege states that each component only has access to
90 Following the principle of least privilege immediately fulfills guest isolation
99 New features must be designed to follow the principle of least privilege.
107 guest isolation and the principle of least privilege. With the exception of
/qemu/target/riscv/
H A Ddebug.c306 * Check the privilege level of specific trigger matches CPU's current privilege
320 /* check U/S/M bit against current privilege level */ in trigger_priv_match()
327 /* check VU/VS bit against current privilege level */ in trigger_priv_match()
332 /* check U/S/M bit against current privilege level */ in trigger_priv_match()
340 /* check VU/VS bit against current privilege level */ in trigger_priv_match()
345 /* check U/S/M bit against current privilege level */ in trigger_priv_match()
689 /* check VU/VS bit against current privilege level */ in check_itrigger_priv()
693 /* check U/S/M bit against current privilege level */ in check_itrigger_priv()
747 * since last privilege mode change or timer expire. in riscv_itrigger_update_count()
761 * Only when privilege is changed or itrigger timer expires, in riscv_itrigger_update_count()
[all …]
H A Dcpu.h194 /* Track cycle and icount for each privilege mode */
197 /* Track cycle and icount for each privilege mode when V = 1*/
405 /* PMU cycle & instret privilege mode filtering */
H A Dcpu_helper.c487 /* Determine interrupt enable state of all privilege modes */ in riscv_cpu_local_irq_pending()
840 * This function assumes that src privilege and target privilege are not same
841 * and src privilege is less than target privilege. This includes the virtual
903 * x is the target privilege mode of the trap, will CTR record the trap. In such
1090 * @mode: Indicates current privilege level.
1181 * @mmu_idx: Indicates current privilege level
H A Dpmu.c111 /* Privilege mode filtering */ in riscv_pmu_incr_ctr_rv32()
152 /* Privilege mode filtering */ in riscv_pmu_incr_ctr_rv64()
H A Dpmp.c707 * Convert PMP privilege to TLB page privilege.
/qemu/docs/devel/
H A Duefi-vars.rst16 run with a higher privilege level than the OS so this can be enforced
44 privilege level for the firmware to protect itself, i.e. it does not
/qemu/include/hw/misc/
H A Diotkit-secctl.h17 * + sysbus MMIO region 0 is the "secure privilege control block" registers
18 * + sysbus MMIO region 1 is the "non-secure privilege control block" registers
/qemu/include/hw/xen/interface/arch-x86/
H A Dxen.h122 * The privilege level specifies which modes may enter a trap via a software
124 * privilege levels as follows:
142 uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
/qemu/tests/functional/
H A Dtest_aarch64_sbsaref.py53 As firmware runs at a higher privilege level than the hypervisor we
/qemu/docs/system/devices/
H A Dnet.rst46 (you don't need root privilege to use the virtual network). The virtual
84 passt doesn't require any capability or privilege. passt has
/qemu/scripts/
H A Drdma-migration-helper.sh96 echo "Root privilege is required to setup/clean a rdma/rxe link" >&2
/qemu/target/hppa/
H A Dint_helper.c239 [EXCP_HPT] = "high-privilege transfer trap", in hppa_cpu_do_interrupt()
240 [EXCP_LPT] = "low-privilege transfer trap", in hppa_cpu_do_interrupt()
H A Dcpu.h86 #define EXCP_HPT 23 /* high-privilege transfer trap */
87 #define EXCP_LPT 24 /* low-privilege transfer trap */
H A Dtranslate.c87 int privilege; member
783 if (ctx->privilege != 0) { \
2030 * which keeps the privilege level from being increased.
2035 switch (ctx->privilege) { in do_ibranch_priv()
2037 /* Privilege 0 is maximum and is allowed to decrease. */ in do_ibranch_priv()
2041 /* Privilege 3 is minimum and is never allowed to increase. */ in do_ibranch_priv()
2046 tcg_gen_ori_i64(dest, dest, ctx->privilege); in do_ibranch_priv()
3986 if (ctx->privilege == 0) { in trans_b_gate()
3987 /* Privilege cannot decrease. */ in trans_b_gate()
3990 disp -= ctx->privilege; in trans_b_gate()
[all …]
/qemu/target/i386/tcg/user/
H A Dseg_helper.c64 /* check privilege if software int */ in do_interrupt_user()
/qemu/target/rx/
H A Dhelper.c97 expname = "privilege violation"; in rx_cpu_do_interrupt()
/qemu/target/i386/tcg/
H A Dseg_helper.c733 /* check privilege if software int */ in do_interrupt_protected()
781 /* to inner privilege */ in do_interrupt_protected()
810 /* to same privilege */ in do_interrupt_protected()
994 /* check privilege if software int */ in do_interrupt64()
1035 /* to inner privilege */ in do_interrupt64()
1039 /* to same privilege */ in do_interrupt64()
1824 /* to inner privilege */ in helper_lcall_protected()
1903 /* to same privilege */ in helper_lcall_protected()
2114 /* return to same privilege level */ in helper_ret_protected()
2120 /* return to different privilege level */ in helper_ret_protected()
/qemu/docs/about/
H A Dbuild-platforms.rst159 privilege is required, or the process must be run as an administrator.
/qemu/include/exec/
H A Dtranslation-block.h49 * privilege, must store those bits elsewhere.
/qemu/include/hw/xen/interface/
H A Dphysdev.h76 * Set the current VCPU's I/O privilege level.
/qemu/linux-headers/asm-riscv/
H A Dkvm.h66 /* Possible privilege modes for kvm_riscv_core */
/qemu/docs/devel/testing/
H A Dacpi-bits.rst23 SMBIOS without being in the highest hardware privilege level, ring 0 for
/qemu/hw/misc/
H A Diotkit-secctl.c25 /* Registers in the secure privilege control block */
74 /* Registers in the non-secure privilege control block */
/qemu/target/sparc/
H A Dcpu.h327 #define SFSR_FT_PRIV_BIT (1ULL << 7) /* privilege violation */
328 #define SFSR_PR_BIT (1ULL << 3) /* privilege mode */

123