/qemu/hw/misc/ |
H A D | exynos4210_pmu.c | 2 * Exynos4210 Power Management Unit (PMU) Emulation 68 /* Decides whether system-level low-power mode is used. */ 95 /* Registers to set system-level low-power option */ 162 #define ARM_CORE0_CONFIGURATION 0x2000 /* Configure power mode of ARM_CORE0 */ 163 #define ARM_CORE0_STATUS 0x2004 /* Check power mode of ARM_CORE0 */ 165 #define ARM_CORE1_CONFIGURATION 0x2080 /* Configure power mode of ARM_CORE1 */ 166 #define ARM_CORE1_STATUS 0x2084 /* Check power mode of ARM_CORE1 */ 169 /* Configure power mode of ARM_CPU_L2_0 */ 171 #define ARM_CPU_L2_0_STATUS 0x2604 /* Check power mode of ARM_CPU_L2_0 */ 172 /* Configure power mode of ARM_CPU_L2_1 */ [all …]
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H A D | sbsa_ec.c | 5 * to communicate platform power states to qemu. 41 if (offset == 0) { /* PSCI machine power command register */ in sbsa_ec_write() 51 "sbsa-ec: unknown power command"); in sbsa_ec_write()
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/qemu/configs/targets/ |
H A D | ppc-softmmu.mak | 4 TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/po…
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H A D | ppc-linux-user.mak | 5 TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/po…
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H A D | ppc64-softmmu.mak | 5 …ILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.x…
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H A D | ppc64le-linux-user.mak | 6 …ILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.x…
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H A D | ppc64-linux-user.mak | 7 …ILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.x…
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/qemu/docs/specs/ |
H A D | fsi.rst | 13 FSI allows a service processor access to the internal buses of a host POWER 14 processor to perform configuration or debugging. FSI has long existed in POWER 18 Working backwards from the POWER processor, the fundamental pieces of interest 22 "engines" that drive accesses on buses internal and external to the POWER 33 driving CFAM engine accesses into the POWER chip. At the hardware level 37 4. The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in POWER 110 pdbg is a simple application to allow debugging of the host POWER processors 122 https://github.com/open-power/pdbg
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H A D | rapl-msr.rst | 5 The RAPL interface (Running Average Power Limit) is advertising the accumulated 6 energy consumption of various power domains (e.g. CPU packages, DRAM, etc.). 9 MSR_PKG_ENERGY_STATUS for the CPU package power domain. These MSRs are 64 bits 29 spec and specify the power limit of the package, provide range of parameter(min 30 power, max power,..) and also the information of the multiplier for the energy 31 counter to calculate the power. Those MSRs are populated once at the beginning 37 it with the UNIT provided above you'll get the power in micro-joules. This 152 - Only the Package Power-Plane (MSR_PKG_ENERGY_STATUS) is reported at the
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H A D | ppc-spapr-hotplug.rst | 10 are documented extensively in section 13 of the Linux on Power Architecture 26 the name/index/power-domain/type of each DRC allocated to a guest at 47 Power Architecture Reference ([LoPAR]_) section 13.5.2.4, and basically 90 ``ibm,drc-power-domains`` 96 power domain the resource will be assigned to. In the case of QEMU we 97 associated all resources with a "live insertion" domain, where the power is 130 ``rtas-set-power-level`` 133 Set the power level for a specified power domain. 135 ``arg[0]``: integer identifying power domain. 137 ``arg[1]``: new power level for the domain, ``0-100``. [all …]
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H A D | virt-ctlr.rst | 17 The only feature supported for the moment is power control (0x01). 21 The implemented commands are part of the power control feature and
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/qemu/include/hw/misc/macio/ |
H A D | pmu.h | 3 * which controls battery charging and system power on PowerBook 3400 22 #define PMU_POWER_CTRL0 0x10 /* control power of some devices */ 23 #define PMU_POWER_CTRL 0x11 /* control power of some devices */ 38 #define PMU_SHUTDOWN 0x7e /* turn power off */ 41 #define PMU_POWER_EVENTS 0x8f /* Send power-event commands to PMU */ 52 #define PMU_POW0_ON 0x80 /* OR this to power ON the device */ 53 #define PMU_POW0_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 54 #define PMU_POW0_HARD_DRIVE 0x04 /* Hard drive power 58 #define PMU_POW_ON 0x80 /* OR this to power ON the device */ 59 #define PMU_POW_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ [all …]
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/qemu/hw/pci/ |
H A D | shpc.c | 13 /* TODO: model power only and disabled slot states. */ 145 return "power-only"; in shpc_slot_state_to_str() 290 static bool shpc_slot_is_off(uint8_t state, uint8_t power, uint8_t attn) in shpc_slot_is_off() argument 292 return state == SHPC_STATE_DISABLED && power == SHPC_LED_OFF; in shpc_slot_is_off() 296 uint8_t state, uint8_t power, uint8_t attn) in shpc_slot_command() argument 314 if (power == SHPC_LED_NO) { in shpc_slot_command() 315 power = old_power; in shpc_slot_command() 318 shpc_set_status(shpc, slot, power, SHPC_SLOT_PWR_LED_MASK); in shpc_slot_command() 344 shpc_led_state_to_str(power), in shpc_slot_command() 352 shpc_slot_is_off(state, power, attn)) in shpc_slot_command() [all …]
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/qemu/include/standard-headers/linux/ |
H A D | pci_regs.h | 211 #define PCI_CAP_ID_PM 0x01 /* Power Management */ 236 /* Power Management Registers */ 243 #define PCI_PM_CAP_AUX_POWER 0x01C0 /* Auxiliary power support mask */ 244 #define PCI_PM_CAP_D1 0x0200 /* D1 power state support */ 245 #define PCI_PM_CAP_D2 0x0400 /* D2 power state support */ 255 #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ 263 #define PCI_PM_BPCC_ENABLE 0x80 /* Bus power/clock control enable (??) */ 498 #define PCI_EXP_DEVCAP_PWR_IND 0x00004000 /* Power Indicator Present */ 500 #define PCI_EXP_DEVCAP_PWR_VAL 0x03fc0000 /* Slot Power Limit Value */ 501 #define PCI_EXP_DEVCAP_PWR_SCL 0x0c000000 /* Slot Power Limit Scale */ [all …]
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/qemu/hw/sensor/ |
H A D | max34451.c | 70 | 0 | Power supply monitored by RS0, controlled by PSEN0, and | 73 | 1 | Power supply monitored by RS1, controlled by PSEN1, and | 76 | 2 | Power supply monitored by RS2, controlled by PSEN2, and | 79 | 3 | Power supply monitored by RS3, controlled by PSEN3, and | 82 | 4 | Power supply monitored by RS4, controlled by PSEN4, and | 85 | 5 | Power supply monitored by RS5, controlled by PSEN5, and | 88 | 6 | Power supply monitored by RS6, controlled by PSEN6, and | 91 | 7 | Power supply monitored by RS7, controlled by PSEN7, and | 94 | 8 | Power supply monitored by RS8, controlled by PSEN8, and | 97 | 9 | Power supply monitored by RS9, controlled by PSEN9, and | [all …]
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/qemu/docs/system/ppc/ |
H A D | pseries.rst | 5 The Power machine para-virtualized environment described by the Linux on Power 7 is also known as sPAPR, System p guests, or simply Power Linux guests (although 17 * Multi processor support for many Power processors generations: 160 Currently, there are two implementations of KVM on Power, ``kvm_hv.ko`` and 180 on hypervisor mode on a Power processor (this function was restricted to 202 KVM-HV uses the hypervisor mode of more recent Power processors, that allow 207 Power bare metal). Although it runs on a PowerNV platform, it can only be used 209 hypervisor mode of the Power CPU, it wasn't possible to run KVM-HV on a guest. 267 POWER (PAPR) Protected Execution Facility (PEF) 306 .. [LoPAR] `Linux on Power Architecture Reference document (LoPAR) revision
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H A D | powernv.rst | 11 runtime services. Power Systems have a lower firmware (HostBoot) that 24 * Simple OCC is an on-chip micro-controller used for power management tasks. 49 GitHub <https://github.com/open-power>`_. 52 `OpenPOWER <https://github.com/open-power/op-build/releases/>`__ site. 60 KVM acceleration in Linux Power hosts is provided by the kvm-hv and 158 iBT interface and should offer the same power features.
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/qemu/tests/qemu-iotests/ |
H A D | 103.out | 12 qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 51… 13 qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 51… 14 qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 51…
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H A D | 206.out | 226 Job failed: Cluster size must be a power of two between 512 and 2048k 232 Job failed: Cluster size must be a power of two between 512 and 2048k 238 Job failed: Cluster size must be a power of two between 512 and 2048k 244 Job failed: Cluster size must be a power of two between 512 and 2048k 257 Job failed: Refcount width must be a power of two and may not exceed 64 bits 263 Job failed: Refcount width must be a power of two and may not exceed 64 bits 269 Job failed: Refcount width must be a power of two and may not exceed 64 bits
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H A D | 112.out | 6 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits 8 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits 10 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits 12 qemu-img: TEST_DIR/t.IMGFMT: Refcount width must be a power of two and may not exceed 64 bits
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/qemu/target/ppc/translate/ |
H A D | processor-ctrl-impl.c.inc | 2 * Power ISA decode for Storage Control instructions 28 * Before Power ISA 2.07, processor control instructions were only 52 * Before Power ISA 2.07, processor control instructions were only
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/qemu/hw/gpio/ |
H A D | zaurus.c | 39 uint16_t power; member 91 return s->power; in scoop_read() 128 s->power = value; in scoop_write() 130 s->power |= 0x8040; in scoop_write() 230 VMSTATE_UINT16(power, ScoopInfo),
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/qemu/docs/tools/ |
H A D | qemu-vmsr-helper.rst | 15 Accessing the RAPL (Running Average Power Limit) MSR enables the RAPL powercap 16 driver to advertise and monitor the power consumption or accumulated energy 17 consumption of different power domains, such as CPU packages, DRAM, and other
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/qemu/target/arm/ |
H A D | arm-powerctl.c | 2 * QEMU support -- ARM Power Control specific functions. 91 /* Finally set the power status */ in arm_set_cpu_on_async_work() 162 * ON_PENDING and additional attempts to power on the CPU should in arm_set_cpu_on() 199 /* Finally set the power status */ in arm_set_cpu_on_and_reset_async_work() 228 * ON_PENDING and additional attempts to power on the CPU should in arm_set_cpu_on_and_reset()
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/qemu/tests/functional/qemu_test/ |
H A D | utils.py | 21 Round up to next power of 2 32 Expand file size to next power of 2
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