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/linux-6.15/tools/testing/selftests/kvm/arm64/
Dvgic_irq.c1 // SPDX-License-Identifier: GPL-2.0
3 * vgic_irq.c - Test userspace injection of IRQs
5 * This test validates the injection of IRQs from userspace using various
27 uint32_t nr_irqs; /* number of KVM supported IRQs. */
36 * 0x00 (highest priority) - 0xF8 (lowest priority), in steps of 8
44 #define LOWEST_PRIO (KVM_NUM_PRIOS - 1)
46 #define IRQ_DEFAULT_PRIO (LOWEST_PRIO - 1)
67 uint32_t num; member
74 uint32_t num, int level, bool expect_failure);
80 #define _KVM_INJECT_MULTI(cmd, intid, num, expect_failure) \ argument
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/linux-6.15/drivers/gpio/
Dgpio-reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * gpio-reg: single register individually fixed-direction GPIOs
19 #include <linux/gpio/gpio-reg.h>
28 const int *irqs; member
37 return r->direction & BIT(offset) ? GPIO_LINE_DIRECTION_IN : in gpio_reg_get_direction()
46 if (r->direction & BIT(offset)) in gpio_reg_direction_output()
47 return -ENOTSUPP; in gpio_reg_direction_output()
49 gc->set(gc, offset, value); in gpio_reg_direction_output()
57 return r->direction & BIT(offset) ? 0 : -ENOTSUPP; in gpio_reg_direction_input()
66 spin_lock_irqsave(&r->lock, flags); in gpio_reg_set()
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/linux-6.15/Documentation/devicetree/bindings/interrupt-controller/
Dfsl,irqsteer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
15 - const: fsl,imx-irqsteer
16 - items:
17 - enum:
18 - fsl,imx8m-irqsteer
19 - fsl,imx8mp-irqsteer
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Dimg,pdc-intc.txt10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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/linux-6.15/arch/powerpc/sysdev/
Dmsi_bitmap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2006-2008, Michael Ellerman, IBM Corporation.
15 int msi_bitmap_alloc_hwirqs(struct msi_bitmap *bmp, int num) in msi_bitmap_alloc_hwirqs() argument
18 int offset, order = get_count_order(num); in msi_bitmap_alloc_hwirqs()
20 spin_lock_irqsave(&bmp->lock, flags); in msi_bitmap_alloc_hwirqs()
22 offset = bitmap_find_next_zero_area(bmp->bitmap, bmp->irq_count, 0, in msi_bitmap_alloc_hwirqs()
23 num, (1 << order) - 1); in msi_bitmap_alloc_hwirqs()
24 if (offset > bmp->irq_count) in msi_bitmap_alloc_hwirqs()
27 bitmap_set(bmp->bitmap, offset, num); in msi_bitmap_alloc_hwirqs()
28 spin_unlock_irqrestore(&bmp->lock, flags); in msi_bitmap_alloc_hwirqs()
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/linux-6.15/drivers/usb/gadget/udc/
Dgoku_udc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Toshiba TC86C001 ("Goku-S") USB Device Controller driver
5 * Copyright (C) 2000-2002 Lineo
12 * This device has ep0 and three semi-configurable bulk/interrupt endpoints.
14 * - Endpoint numbering is fixed: ep{1,2,3}-bulk
15 * - Gadget drivers can choose ep maxpacket (8/16/32/64)
16 * - Gadget drivers can choose direction (IN, OUT)
17 * - DMA works with ep1 (OUT transfers) and ep2 (IN transfers).
21 // #define USB_TRACE /* packet-level success messages */
49 #define DRIVER_VERSION "30-Oct 2003"
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Dgr_udc.c1 // SPDX-License-Identifier: GPL-2.0+
14 * - Andreas Larsson <andreas@gaisler.com>
15 * - Marko Isomaki
36 #include <linux/dma-mapping.h>
64 /* ---------------------------------------------------------------------- */
93 int buflen = ep->is_in ? req->req.length : req->req.actual; in gr_dbgprint_request()
97 dev_dbg(ep->dev->dev, "%s: 0x%p, %d bytes data%s:\n", str, req, buflen, in gr_dbgprint_request()
100 rowlen, 4, req->req.buf, plen, false); in gr_dbgprint_request()
106 dev_vdbg(dev->dev, "REQ: %02x.%02x v%04x i%04x l%04x\n", in gr_dbgprint_devreq()
119 /* ---------------------------------------------------------------------- */
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Dnet2280.c1 // SPDX-License-Identifier: GPL-2.0+
27 * Copyright (C) 2003-2005 PLX Technology, Inc.
28 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
39 #include <linux/dma-mapping.h>
87 EP_INFO("ep-a",
89 EP_INFO("ep-b",
91 EP_INFO("ep-c",
93 EP_INFO("ep-d",
95 EP_INFO("ep-e",
97 EP_INFO("ep-f",
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/linux-6.15/drivers/irqchip/
Dirq-imgpdc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2010-2013 Imagination Technologies Ltd.
66 * struct pdc_intc_priv - private pdc interrupt data.
71 * @domain: IRQ domain for PDC peripheral and syswake IRQs.
92 iowrite32(data, priv->pdc_base + reg_offs); in pdc_write()
98 return ioread32(priv->pdc_base + reg_offs); in pdc_read()
112 return hw - SYS0_HWIRQ; in hwirq_to_syswake()
122 return (struct pdc_intc_priv *)data->domain->host_data; in irqd_to_priv()
135 raw_spin_lock(&priv->lock); in perip_irq_mask()
136 priv->irq_route &= ~data->mask; in perip_irq_mask()
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Dirq-mbigen.c1 // SPDX-License-Identifier: GPL-2.0-only
22 /* 64 irqs (Pin0-pin63) are reserved for each mbigen chip */
57 * struct mbigen_device - holds the information of mbigen device.
85 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; in get_mbigen_vec_reg()
97 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; in get_mbigen_type_reg()
118 void __iomem *base = data->chip_data; in mbigen_eoi_irq()
121 get_mbigen_clear_reg(data->hwirq, &mask, &addr); in mbigen_eoi_irq()
130 void __iomem *base = data->chip_data; in mbigen_set_type()
134 return -EINVAL; in mbigen_set_type()
136 get_mbigen_type_reg(data->hwirq, &mask, &addr); in mbigen_set_type()
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/linux-6.15/drivers/base/
Dplatform.c1 // SPDX-License-Identifier: GPL-2.0
3 * platform.c - platform 'pseudo' bus for legacy devices
5 * Copyright (c) 2002-3 Patrick Mochel
6 * Copyright (c) 2002-3 Open Source Development Labs
8 * Please see Documentation/driver-api/driver-model/platform.rst for more
20 #include <linux/dma-mapping.h>
28 #include <linux/clk/clk-conf.h>
34 #include <linux/dma-map-ops.h>
48 * platform_get_resource - get a resource for a device
51 * @num: resource index
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/linux-6.15/drivers/s390/cio/
Dairq.c1 // SPDX-License-Identifier: GPL-2.0
35 * register_adapter_interrupt() - register adapter interrupt handler
38 * Returns 0 on success, or -EINVAL.
44 if (!airq->handler || airq->isc > MAX_ISC) in register_adapter_interrupt()
45 return -EINVAL; in register_adapter_interrupt()
46 if (!airq->lsi_ptr) { in register_adapter_interrupt()
47 airq->lsi_ptr = cio_dma_zalloc(1); in register_adapter_interrupt()
48 if (!airq->lsi_ptr) in register_adapter_interrupt()
49 return -ENOMEM; in register_adapter_interrupt()
50 airq->flags |= AIRQ_PTR_ALLOCATED; in register_adapter_interrupt()
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/linux-6.15/kernel/irq/
Dmatrix.c1 // SPDX-License-Identifier: GPL-2.0
41 * irq_alloc_matrix - Allocate a irq_matrix structure and initialize it
58 m->system_map = &m->scratch_map[matrix_size]; in irq_alloc_matrix()
60 m->matrix_bits = matrix_bits; in irq_alloc_matrix()
61 m->alloc_start = alloc_start; in irq_alloc_matrix()
62 m->alloc_end = alloc_end; in irq_alloc_matrix()
63 m->alloc_size = alloc_end - alloc_start; in irq_alloc_matrix()
64 m->maps = __alloc_percpu(struct_size(m->maps, alloc_map, matrix_size * 2), in irq_alloc_matrix()
65 __alignof__(*m->maps)); in irq_alloc_matrix()
66 if (!m->maps) { in irq_alloc_matrix()
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/linux-6.15/drivers/net/ethernet/hisilicon/
Dhisi_femac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
38 #define HW_RX_FIFO_DEPTH (MAX_HW_FIFO_DEPTH - HW_TX_FIFO_DEPTH)
84 #define MAX_MULTICAST_ADDRESSES (MAX_MAC_FILTER_NUM - \
91 #define PHY_RESET_DELAYS_PROPERTY "hisilicon,phy-reset-delays-us"
103 int num; member
126 static void hisi_femac_irq_enable(struct hisi_femac_priv *priv, int irqs) in hisi_femac_irq_enable() argument
130 val = readl(priv->glb_base + GLB_IRQ_ENA); in hisi_femac_irq_enable()
131 writel(val | irqs, priv->glb_base + GLB_IRQ_ENA); in hisi_femac_irq_enable()
134 static void hisi_femac_irq_disable(struct hisi_femac_priv *priv, int irqs) in hisi_femac_irq_disable() argument
138 val = readl(priv->glb_base + GLB_IRQ_ENA); in hisi_femac_irq_disable()
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/linux-6.15/drivers/vdpa/solidrun/
Dsnet_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2022-2023 SolidRun
7 * Author: Alvaro Karsz <alvaro.karsz@solid-run.com>
42 if (likely(snet->cb.callback)) in snet_cfg_irq_hndlr()
43 return snet->cb.callback(snet->cb.private); in snet_cfg_irq_hndlr()
52 if (likely(vq->cb.callback)) in snet_vq_irq_hndlr()
53 return vq->cb.callback(vq->cb.private); in snet_vq_irq_hndlr()
60 struct psnet *psnet = snet->psnet; in snet_free_irqs()
64 /* Which Device allcoated the IRQs? */ in snet_free_irqs()
66 pdev = snet->pdev->physfn; in snet_free_irqs()
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/linux-6.15/include/linux/gpio/
Dgpio-reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 int base, int num, const char *label, u32 direction, u32 def_out,
14 const char *const *names, struct irq_domain *irqdom, const int *irqs);
/linux-6.15/drivers/bcma/
Ddriver_gpio.c6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
101 .name = "BCMA-GPIO",
111 struct gpio_chip *gc = &cc->gpio; in bcma_gpio_irq_handler()
115 unsigned long irqs = (val ^ pol) & mask; in bcma_gpio_irq_handler() local
118 if (!irqs) in bcma_gpio_irq_handler()
121 for_each_set_bit(gpio, &irqs, gc->ngpio) in bcma_gpio_irq_handler()
122 generic_handle_domain_irq_safe(gc->irq.domain, gpio); in bcma_gpio_irq_handler()
123 bcma_chipco_gpio_polarity(cc, irqs, val & irqs); in bcma_gpio_irq_handler()
130 struct gpio_chip *chip = &cc->gpio; in bcma_gpio_irq_init()
131 struct gpio_irq_chip *girq = &chip->irq; in bcma_gpio_irq_init()
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/linux-6.15/drivers/thermal/qcom/
Dtsens.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/nvmem-consumer.h>
26 * struct tsens_irq_data - IRQ status and temperature violations
29 * @up_irq_mask: mask register for upper threshold irqs
30 * @up_irq_clear: clear register for uppper threshold irqs
33 * @low_irq_mask: mask register for lower threshold irqs
34 * @low_irq_clear: clear register for lower threshold irqs
37 * @crit_irq_mask: mask register for critical threshold irqs
38 * @crit_irq_clear: clear register for critical threshold irqs
81 if (priv->num_sensors > MAX_SENSORS) in tsens_read_calibration()
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/linux-6.15/arch/arm/mach-sa1100/
Dneponset.c1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/arm/mach-sa1100/neponset.c
7 #include <linux/gpio/gpio-reg.h>
20 #include <asm/mach-types.h>
28 #include <mach/irqs.h>
85 .dev_id = "sa11x0-uart.1",
87 GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
88 GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
89 GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
90 GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
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/linux-6.15/drivers/vdpa/octeon_ep/
Doctep_vdpa_main.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/io-64-nonatomic-lo-hi.h>
44 return oct_vdpa->oct_hw; in vdpa_to_octep_hw()
54 * round-robin fashion. in octep_vdpa_intr_handler()
57 * 0 -> 0, 8, 16, 24, 32, 40, 48, 56; in octep_vdpa_intr_handler()
58 * 1 -> 1, 9, 17, 25, 33, 41, 49, 57; in octep_vdpa_intr_handler()
60 * 7 -> 7, 15, 23, 31, 39, 47, 55, 63; in octep_vdpa_intr_handler()
63 for (i = irq - oct_hw->irqs[0]; i < oct_hw->nr_vring; i += oct_hw->nb_irqs) { in octep_vdpa_intr_handler()
64 if (ioread8(oct_hw->vqs[i].cb_notify_addr)) { in octep_vdpa_intr_handler()
66 iowrite8(0, oct_hw->vqs[i].cb_notify_addr); in octep_vdpa_intr_handler()
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/linux-6.15/drivers/mfd/
Dcs42l43-sdw.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022-2023 Cirrus Logic, Inc. and
13 #include <linux/mfd/cs42l43-regs.h>
25 .num = port, \
63 struct sdw_slave_prop *prop = &sdw->prop; in cs42l43_read_prop()
64 struct device *dev = &sdw->dev; in cs42l43_read_prop()
67 prop->use_domain_irq = true; in cs42l43_read_prop()
68 prop->paging_support = true; in cs42l43_read_prop()
69 prop->wake_capable = true; in cs42l43_read_prop()
70 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; in cs42l43_read_prop()
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/linux-6.15/arch/arm64/boot/dts/freescale/
Dimx8qm-ss-lvds.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 clock-indices = <IMX_LPCG_CLK_4>;
15 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
21 clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
35 interrupt-parent = <&irqsteer_lvds0>;
37 irqsteer_lvds0: interrupt-controller@56240000 {
38 compatible = "fsl,imx8qm-irqsteer", "fsl,imx-irqsteer";
41 interrupt-controller;
42 interrupt-parent = <&gic>;
43 #interrupt-cells = <1>;
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/linux-6.15/drivers/net/wireless/ath/ath11k/
Dcore.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
52 /* SMBIOS type structure length (excluding strings-set) */
173 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; member
186 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
321 * struct ath11k_chan_power_info - TPE containing power info per channel chunk
339 * struct ath11k_reg_tpc_power_info - regulatory TPC power info
415 /* Must be last - ends in a flexible-array member.
533 /* the following are protected by ar->data_lock */
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/linux-6.15/drivers/net/ethernet/emulex/benet/
Dbe.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2005 - 2016 Broadcom
7 * linux-drivers@emulex.com
31 #include <linux/hwmon-sysfs.h>
60 /* Number of bytes of an RX frame that are copied to skb->data */
67 #define BE_MAX_MTU (BE_MAX_JUMBO_FRAME_SIZE - \
71 #define BE_MAX_GSO_SIZE (65535 - 2 * VLAN_HLEN)
105 #define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
111 #define CNTL_SERIAL_NUM_WORD_SZ (sizeof(u16)) /* Byte-sz of serial num word */
136 BUG_ON(limit & (limit - 1)); in MODULO()
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/linux-6.15/drivers/tty/serial/
Dimx.c1 // SPDX-License-Identifier: GPL-2.0+
31 #include <linux/dma-mapping.h>
34 #include <linux/dma/imx-dma.h>
126 #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
162 /* We've been assigned a range on the "Low-density serial ports" major */
175 #define DRIVER_NAME "IMX-uart"
259 * compatible to fsl,imx6q-uart, but not fsl,imx21-uart, while the
260 * original imx6q's UART is compatible to fsl,imx21-uart. This driver
263 { .compatible = "fsl,imx6q-uart", .data = &imx_uart_imx21_devdata, },
264 { .compatible = "fsl,imx1-uart", .data = &imx_uart_imx1_devdata, },
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