Searched +full:non +full:- +full:secure +full:- +full:domain (Results 1 – 20 of 20) sorted by relevance
6 * SPDX-License-Identifier: GPL-2.0-or-later12 #include "qemu/main-loop.h"13 #include "exec/page-protection.h"15 #include "exec/tlb-flags.h"19 #include "cpu-features.h"32 * If a Secure ptw is "downgraded" to NonSecure by an NSTable bit,39 * If a Secure ptw is "downgraded" to NonSecure by an NSTable bit,45 * - if the in_ptw_idx is an ARMMMUIdx_Phys_* then the mmuidx47 * - if the in_ptw_idx is an ARMMMUIdx_Stage2* then the security50 * stage 1 is Secure; in that case the only possibilities for[all …]
2 * QEMU ARM CPU -- internal functions and types18 * <http://www.gnu.org/licenses/gpl-2.0.html>31 #include "accel/tcg/tb-cpu-state.h"33 #include "tcg/tcg-gvec-desc.h"36 #include "cpu-features.h"50 return EX_TBFLAG_ANY(env->hflags, MMUIDX); in arm_env_mmu_index()55 /* Return true if this exception number represents a QEMU-internal in excp_is_internal()73 * We will use the back-compat value:74 * - for QEMU CPU types added before we standardized on 1GHz75 * - for versioned machine types with a version of 9.0 or earlier[all …]
23 #include "kvm-consts.h"24 #include "qemu/cpu-float.h"26 #include "cpu-qom.h"27 #include "exec/cpu-common.h"28 #include "exec/cpu-defs.h"29 #include "exec/cpu-interrupt.h"31 #include "exec/page-protection.h"32 #include "qapi/qapi-types-common.h"47 #define EXCP_SMC 13 /* Secure Monitor Call */78 /* ARM-specific interrupt pending bits. */[all …]
6 * SPDX-License-Identifier: GPL-2.0-or-later14 #include "cpu-features.h"15 #include "exec/page-protection.h"16 #include "exec/mmap-lock.h"17 #include "qemu/main-loop.h"20 #include "qemu/qemu-print.h"22 #include "exec/translation-block.h"24 #include "system/cpu-timers.h"29 #include "qemu/guest-random.h"33 #include "semihosting/common-semi.h"[all …]
1 /* SPDX-License-Identifier: MIT */5 * Unified block-device I/O interface for Xen guest OSes.7 * Copyright (c) 2003-2004, Keir Fraser18 * Front->back notifications: When enqueuing a new request, sending a20 * hold-off mechanism provided by the ring macros). Backends must set23 * Back->front notifications: When enqueuing a new response, sending a25 * hold-off mechanism provided by the ring macros). Frontends must set63 *------------------ Backend Device Identification (PRIVATE) ------------------78 * physical-device85 * physical-device-path[all …]
7 ------------19 -------------------------34 * AP domain36 An adapter is partitioned into domains. Each domain can be thought of as38 hold up to 256 domains; however, the maximum domain number allowed is39 determined by machine model. Each domain is identified by a number from 0 to46 commands sent to a usage domain to control or change the domain; for47 example, to set a secure private key for the domain.51 An AP queue is the means by which an AP command-request message is sent to an52 AP usage domain inside a specific AP. An AP queue is identified by a tuple[all …]
9 * R0 - semihosting call number10 * R1 - semihosting parameter26 .size \name, . - \name57 ite EQ // if-then-else. "EQ" is for if equal, else otherwise79 * PA[31:20] - Section Base Address80 * NS[19] - Non-secure bit81 * 0[18] - Section (1 for Super Section)82 * nG[17] - Not global bit83 * S[16] - Shareable84 * TEX[14:12] - Memory Region Attributes[all …]
1 # -*- Mode: Python -*-11 # later. See the COPYING file in the top-level directory.18 'member-name-exceptions': [25 # Lists the firmware-OS interface types provided by various firmware32 # 1275-1994 standard. Examples for firmware projects that35 # @uboot: Firmware interface defined by the U-Boot project.71 # @aarch64: 64-bit Arm.73 # @arm: 32-bit Arm.75 # @i386: 32-bit x86.77 # @loongarch64: 64-bit LoongArch. (since: 7.1)[all …]
5 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>32 #include "qemu/error-report.h"35 #include "hw/acpi/acpi-defs.h"38 #include "hw/acpi/bios-linker-loader.h"39 #include "hw/acpi/aml-build.h"49 #include "hw/pci-host/gpex.h"53 #include "hw/platform-bus.h"60 #include "hw/virtio/virtio-acpi.h"72 for (i = 0; i < ms->smp.cpus; i++) { in acpi_dsdt_add_cpus()88 aml_append(crs, aml_memory32_fixed(uart_memmap->base, in acpi_dsdt_add_uart()[all …]
2 * ARM mach-virt emulation23 * + we want to present a very stripped-down minimalist platform,41 #include "hw/vfio/vfio-calxeda-xgmac.h"42 #include "hw/vfio/vfio-amd-xgbe.h"57 #include "qemu/error-report.h"59 #include "hw/pci-host/gpex.h"60 #include "hw/virtio/virtio-pci.h"61 #include "hw/core/sysbus-fdt.h"62 #include "hw/platform-bus.h"63 #include "hw/qdev-properties.h"[all …]
2 * ARM GICv3 support - common bits of emulated and KVM kernel model27 #include "qemu/error-report.h"30 #include "hw/qdev-properties.h"33 #include "hw/arm/linux-boot-if.h"39 if (cs->gicd_no_migration_shift_bug) { in gicv3_gicd_no_migration_shift_bug_post_load()50 memmove(cs->group, (uint8_t *)cs->group + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()51 sizeof(cs->group) - GIC_INTERNAL / 8); in gicv3_gicd_no_migration_shift_bug_post_load()52 memmove(cs->grpmod, (uint8_t *)cs->grpmod + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()53 sizeof(cs->grpmod) - GIC_INTERNAL / 8); in gicv3_gicd_no_migration_shift_bug_post_load()54 memmove(cs->enabled, (uint8_t *)cs->enabled + GIC_INTERNAL / 8, in gicv3_gicd_no_migration_shift_bug_post_load()[all …]
3 A-profile CPU architecture support7 Armv8 and Armv9 versions of the A-profile architecture. It also has support for10 - FEAT_AA32BF16 (AArch32 BFloat16 instructions)11 - FEAT_AA32EL0 (Support for AArch32 at EL0)12 - FEAT_AA32EL1 (Support for AArch32 at EL1)13 - FEAT_AA32EL2 (Support for AArch32 at EL2)14 - FEAT_AA32EL3 (Support for AArch32 at EL3)15 - FEAT_AA32HPD (AArch32 hierarchical permission disables)16 - FEAT_AA32I8MM (AArch32 Int8 matrix multiplication instructions)17 - FEAT_AA64EL0 (Support for AArch64 at EL0)[all …]
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */2 /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.23 * - ENOTTY: The IOCTL number itself is not supported at all24 * - E2BIG: The IOCTL number is supported, but the provided structure has25 * non-zero in a part the kernel does not understand.26 * - EOPNOTSUPP: The IOCTL number is supported, and the structure is29 * - EINVAL: Everything about the IOCTL was understood, but a field is not31 * - ENOENT: An ID or IOVA provided does not exist.32 * - ENOMEM: Out of memory.33 * - EOVERFLOW: Mathematics overflowed.[all …]
14 "-h or -help display this help and exit\n", QEMU_ARCH_ALL)16 ``-h``21 "-version display version information and exit\n", QEMU_ARCH_ALL)23 ``-version``28 "-machine [type=]name[,prop[=value][,...]]\n"29 " selects emulated machine ('-machine help' for list)\n"33 " dump-guest-core=on|off include guest memory in a core dump (default=on)\n"34 " mem-merge=on|off controls memory merge support (default: on)\n"35 " aes-key-wrap=on|off controls support for AES key wrapping (default=on)\n"36 " dea-key-wrap=on|off controls support for DEA key wrapping (default=on)\n"[all …]
10 consult qemu-devel and not any specific individual privately.14 M: Mail patches to: FullName <address@domain>17 R: Designated reviewer: FullName <address@domain>23 W: Web-page with status/info59 ------------------------------63 L: qemu-devel@nongnu.org72 R: Philippe Mathieu-Daudé <philmd@linaro.org>75 F: docs/devel/build-environment.rst76 F: docs/devel/code-of-conduct.rst78 F: docs/devel/conflict-resolution.rst[all …]
8 #include "hw/mem/pc-dimm.h"32 #define TYPE_SPAPR_RTC "spapr-rtc"44 #define TYPE_SPAPR_MACHINE "spapr-machine"72 /* Nested KVM-HV */104 /* SPAPR_CAP_IBS (cap-ibs) */118 * for non-CPU resources.121 * array for any non-CPU resource.127 * FORM2 NUMA affinity has a single associativity domain, giving146 bool dr_phb_enabled; /* enable dynamic-reconfig/hotplug of PHBs */151 bool pre_4_1_migration; /* don't migrate hpt-max-page-size */[all …]
5 any of the tools (like ``qemu-img``). This includes the preferred formats10 ``qemu-img create`` and ``qemu-img convert`` using the ``-o`` option.13 .. program:: image-formats20 space. Use ``qemu-img info`` to know the real size used by the21 image or ``ls -ls`` on Unix/Linux.34 .. program:: image-formats51 zero clusters, which allow efficient copy-on-read for sparse images.69 use to unlock the LUKS key slot is given by the ``encrypt.key-secret``73 If this is set to ``aes``, the image is encrypted with 128-bit AES-CBC.74 The encryption key is given by the ``encrypt.key-secret`` parameter.[all …]
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6 * SPDX-License-Identifier: GPL-2.0-or-later14 #include "cpu-features.h"83 * Non-IS variants of TLB operations are upgraded to218 * Page D4-1736 (DDI0487A.b)392 * flush-last-level-only. in tlbi_aa64_vae2_write()408 * flush-last-level-only. in tlbi_aa64_vae3_write()434 * since we don't support flush-for-specific-ASID-only or in tlbi_aa64_vae1_write()435 * flush-last-level-only. in tlbi_aa64_vae1_write()475 * is implemented and SCR_EL3.NS is not set (i.e. in secure mode). in ipas2e1_tlbmask()511 * the unified TLB ops but also the dside/iside/inner-shareable variants.[all …]
1 # -*- Mode: Python -*-20 # @vm-state-size: size of the VM state22 # @date-sec: UTC date of the snapshot in seconds24 # @date-nsec: fractional part in nano seconds to be used with date-sec26 # @vm-clock-sec: VM clock relative to boot in seconds28 # @vm-clock-nsec: fractional part in nano seconds to be used with29 # vm-clock-sec32 # record/replay is enabled. Used for "time-traveling" to match34 # counter may be obtained through @query-replay command40 'data': { 'id': 'str', 'name': 'str', 'vm-state-size': 'int',[all …]