Searched +full:non +full:- +full:programmable (Results 1 – 25 of 160) sorted by relevance
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| /linux-5.10/Documentation/devicetree/bindings/display/bridge/ |
| D | simple-bridge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/simple-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent non-programmable DRM bridges
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Maxime Ripard <mripard@kernel.org>
14 This binding supports transparent non-programmable bridges that don't require
20 - items:
21 - enum:
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| /linux-5.10/drivers/mtd/chips/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
53 are expected to be wired to the CPU in 'host-endian' form.
83 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
90 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
97 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
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| /linux-5.10/drivers/staging/axis-fifo/ |
| D | axis-fifo.txt | 1 Xilinx AXI-Stream FIFO v4.1 IP core
3 This IP core has read and write AXI-Stream FIFOs, the contents of which can
4 be accessed from the AXI4 memory-mapped interface. This is useful for
11 Currently supports only store-forward mode with a 32-bit
12 AXI4-Lite interface. DOES NOT support:
13 - cut-through mode
14 - AXI4 (non-lite)
17 - compatible: Should be "xlnx,axi-fifo-mm-s-4.1"
18 - interrupt-names: Should be "interrupt"
19 - interrupt-parent: Should be <&intc>
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| /linux-5.10/drivers/nvmem/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
5 Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
29 i.MX SoCs, providing access to 4 Kbits of programmable
33 will be called nvmem-imx-iim.
36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable
45 will be called nvmem-imx-ocotp.
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
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| /linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | coresight-cti.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable.
26 programmable channels, usually 4, but again implementation defined and
29 programmable.
38 indicate this feature (arm,coresight-cti-v8-arch).
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
60 Note that some hardware trigger signals can be connected to non-CoreSight
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| D | coresight.txt | 11 * Required properties for all components *except* non-configurable replicators
12 and non-configurable funnels:
16 - Embedded Trace Buffer (version 1.0):
17 "arm,coresight-etb10", "arm,primecell";
19 - Trace Port Interface Unit:
20 "arm,coresight-tpiu", "arm,primecell";
22 - Trace Memory Controller, used for Embedded Trace Buffer(ETB),
26 "arm,coresight-tmc", "arm,primecell";
28 - Trace Programmable Funnel:
29 "arm,coresight-dynamic-funnel", "arm,primecell";
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| /linux-5.10/arch/m68k/q40/ |
| D | README | 6 available from this place or http://ftp.uni-erlangen.de/pub/unix/Linux/680x0/q40/
13 is not implemented - do not try it! (See below)
15 For a list of kernel command-line options read the documentation for the
22 poll the floppy for this reason - something that can't be done in Linux.
28 serial.c # normal PC driver - any speed
57 requested - SRAM must start with '%LX$' signature to do this. '-d' option
62 only the penguin - and shell prompt if it gets that far..
67 Most problems seem to be caused by fawlty or badly configured io-cards or
77 This is just an overview, see asm-m68k/* for details ask if you have any
80 The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style
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| /linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | opencores,or1k-pic.txt | 1 OpenRISC 1000 Programmable Interrupt Controller
5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
7 edge triggered interrupt lines or "opencores,or1200-pic" for machines
8 with the non-spec compliant or1200 type implementation.
10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
19 intc: interrupt-controller {
20 compatible = "opencores,or1k-pic-level";
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| /linux-5.10/drivers/net/ethernet/neterion/vxge/ |
| D | vxge-traffic.h | 10 * vxge-traffic.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
12 * Copyright(c) 2002-2010 Exar Corp.
17 #include "vxge-reg.h"
18 #include "vxge-version.h"
72 * enum vxge_hw_event- Enumerates slow-path HW events.
83 * @VXGE_HW_EVENT_SLOT_FREEZE: Slot-freeze event. Driver tries to distinguish
84 * slot-freeze from the rest critical events (e.g. ECC) when it is
85 * impossible to PIO read "through" the bus, i.e. when getting all-foxes.
87 * enum vxge_hw_event enumerates slow-path HW eventis.
114 * struct vxge_hw_mempool_dma - Represents DMA objects passed to the
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| /linux-5.10/include/linux/ |
| D | ptp_clock_kernel.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp
39 * struct ptp_clock_info - describes a PTP hardware clock
46 * @n_alarm: The number of programmable alarms.
48 * @n_per_out: The number of programmable periodic signals.
49 * @n_pins: The number of programmable pins.
52 * programmable pins is nonzero, then drivers must
119 * The callbacks must all return zero on success, non-zero otherwise.
159 * struct ptp_clock_event - decribes a PTP hardware clock event
179 * ptp_clock_register() - register a PTP hardware clock driver
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| /linux-5.10/drivers/mtd/maps/ |
| D | sun_uflash.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sun_uflash.c - Driver for user-programmable flash on
5 * This driver does NOT provide access to the OBP-flash for
6 * safety reasons-- use <linux>/drivers/sbus/char/flash.c instead.
31 #define UFLASH_BUSWIDTH 1 /* EBus is 8-bit */
34 MODULE_DESCRIPTION("User-programmable flash device on Sun Microsystems boardsets");
46 .name = "SUNW,???-????",
55 if (op->resource[1].flags) { in uflash_devinit()
56 /* Non-CFI userflash device-- once I find one we in uflash_devinit()
60 dp, (unsigned long long)op->resource[0].start); in uflash_devinit()
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| /linux-5.10/Documentation/devicetree/bindings/media/i2c/ |
| D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
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| D | imx219.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor
10 - Dave Stevenson <dave.stevenson@raspberrypi.com>
12 description: |-
13 The Sony imx219 is a 1/4.0-inch CMOS active pixel digital image sensor
14 with an active array size of 3280H x 2464V. It is programmable through
16 Image data is sent through MIPI CSI-2, which is configured as either 2 or
30 VDIG-supply:
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| /linux-5.10/Documentation/hwmon/ |
| D | nct6775.rst | 19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
87 Guenter Roeck <linux@roeck-us.net>
90 -----------
114 triggered if the rotation speed has dropped below a programmable limit. On
115 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
124 An alarm is triggered if the voltage has crossed a programmable minimum
132 The mode works for fan1-fan5.
135 ----------------
137 pwm[1-7]
138 - this file stores PWM duty cycle or DC value (fan speed) in range:
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| D | pc87360.rst | 22 -----------------
27 - 0: None
28 - **1**: Forcibly enable internal voltage and temperature channels,
30 - 2: Forcibly enable all voltage and temperature channels, except in9
31 - 3: Forcibly enable all voltage and temperature channels, including in9
42 -----------
56 PC87360 - 2 2 - 0xE1
57 PC87363 - 2 2 - 0xE8
58 PC87364 - 3 3 - 0xE4
60 PC87366 11 3 3 3-4 0xE9
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| /linux-5.10/Documentation/devicetree/bindings/display/xlnx/ |
| D | xlnx,zynqmp-dpsub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
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| /linux-5.10/drivers/staging/fieldbus/Documentation/ |
| D | fieldbus_dev.txt | 1 Fieldbus-Device Subsystem
4 Part 0 - What is a Fieldbus Device ?
5 ------------------------------------
8 for real-time distributed control, standardized as IEC 61158.
10 A complex automated industrial system -- such as manufacturing assembly line --
11 usually needs a distributed control system -- an organized hierarchy of
12 controller systems -- to function. In this hierarchy, there is usually a
14 operate the system. This is typically linked to a middle layer of programmable
15 logic controllers (PLC) via a non-time-critical communications system
29 Part I - Why do we need this subsystem?
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| /linux-5.10/drivers/usb/gadget/udc/aspeed-vhub/ |
| D | vhub.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
18 #define AST_VHUB_EP_ACK_IER 0x10 /* Programmable Endpoint Pool ACK Interrupt Enable Register */
19 #define AST_VHUB_EP_NACK_IER 0x14 /* Programmable Endpoint Pool NACK Interrupt Enable Register */
20 #define AST_VHUB_EP_ACK_ISR 0x18 /* Programmable Endpoint Pool ACK Interrupt Status Register */
21 #define AST_VHUB_EP_NACK_ISR 0x1C /* Programmable Endpoint Pool NACK Interrupt Status Register */
24 #define AST_VHUB_EP_TOGGLE 0x28 /* Programmable Endpoint Pool Data Toggle Value Set */
107 * per-device register definitions *
146 * per-endpoint register definitions *
213 #define AST_VHUB_NUM_GEN_EPs 15 /* Generic non-0 EPs */
233 /* A transfer request, either core-originated or internal */
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| /linux-5.10/Documentation/misc-devices/ |
| D | xilinx_sdfec.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
4 Xilinx SD-FEC Driver
10 This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.
15 …f SD-FEC core features, see the `SD-FEC Product Guide (PG256) <https://www.xilinx.com/cgi-bin/docs…
19 - Retrieval of the Integrated Block configuration and status information
20 - Configuration of LDPC codes
21 - Configuration of Turbo decoding
22 - Monitoring errors
24 Missing features, known issues, and limitations of the SD-FEC driver are as
27 - Only allows a single open file handler to any instance of the driver at any time
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| /linux-5.10/tools/perf/pmu-events/arch/x86/nehalemex/ |
| D | pipeline.json | 107 "BriefDescription": "Indirect non call branches executed"
123 "BriefDescription": "All non call branches executed"
198 "BriefDescription": "Mispredicted non call branches executed"
214 "BriefDescription": "Mispredicted indirect non call branches executed"
230 "BriefDescription": "Mispredicted non call branches executed"
271 …cription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)"
287 "BriefDescription": "Cycles when thread is not halted (programmable counter)"
378 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)"
407 "BriefDescription": "Retired floating-point operations (Precise Event)"
466 "BriefDescription": "Self-Modifying Code detected"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
| D | pipeline.json | 107 "BriefDescription": "Indirect non call branches executed"
123 "BriefDescription": "All non call branches executed"
198 "BriefDescription": "Mispredicted non call branches executed"
214 "BriefDescription": "Mispredicted indirect non call branches executed"
230 "BriefDescription": "Mispredicted non call branches executed"
289 …cription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)"
305 "BriefDescription": "Cycles when thread is not halted (programmable counter)"
396 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)"
425 "BriefDescription": "Retired floating-point operations (Precise Event)"
484 "BriefDescription": "Self-Modifying Code detected"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/nehalemep/ |
| D | pipeline.json | 107 "BriefDescription": "Indirect non call branches executed"
123 "BriefDescription": "All non call branches executed"
198 "BriefDescription": "Mispredicted non call branches executed"
214 "BriefDescription": "Mispredicted indirect non call branches executed"
230 "BriefDescription": "Mispredicted non call branches executed"
271 …cription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)"
287 "BriefDescription": "Cycles when thread is not halted (programmable counter)"
378 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)"
407 "BriefDescription": "Retired floating-point operations (Precise Event)"
466 "BriefDescription": "Self-Modifying Code detected"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
| D | pipeline.json | 107 "BriefDescription": "Indirect non call branches executed"
123 "BriefDescription": "All non call branches executed"
198 "BriefDescription": "Mispredicted non call branches executed"
214 "BriefDescription": "Mispredicted indirect non call branches executed"
230 "BriefDescription": "Mispredicted non call branches executed"
289 …cription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)"
305 "BriefDescription": "Cycles when thread is not halted (programmable counter)"
396 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)"
425 "BriefDescription": "Retired floating-point operations (Precise Event)"
484 "BriefDescription": "Self-Modifying Code detected"
[all …]
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| /linux-5.10/tools/perf/pmu-events/arch/x86/westmereex/ |
| D | pipeline.json | 107 "BriefDescription": "Indirect non call branches executed"
123 "BriefDescription": "All non call branches executed"
198 "BriefDescription": "Mispredicted non call branches executed"
214 "BriefDescription": "Mispredicted indirect non call branches executed"
230 "BriefDescription": "Mispredicted non call branches executed"
289 …cription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)"
305 "BriefDescription": "Cycles when thread is not halted (programmable counter)"
396 "BriefDescription": "Instructions retired (Programmable counter and Precise Event)"
425 "BriefDescription": "Retired floating-point operations (Precise Event)"
484 "BriefDescription": "Self-Modifying Code detected"
[all …]
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| /linux-5.10/arch/arm/mach-omap2/ |
| D | clockdomains2xxx_3xxx_data.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2008-2011 Texas Instruments, Inc.
6 * Copyright (C) 2008-2010 Nokia Corporation
16 * software-controllable dependencies. Non-software-controllable
19 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
21 * The overly-specific dep_bit names are due to a bit name collision
27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
31 * To-Do List
32 * -> Port the Sleep/Wakeup dependencies for the domains
42 #include "cm-regbits-24xx.h"
[all …]
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