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/linux-6.8/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,mpm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,mpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcom MPM Interrupt Controller
10 - Shawn Guo <shawn.guo@linaro.org>
14 MSM Power Manager (MPM) that is in always-on domain. In addition to managing
21 - $ref: /schemas/interrupt-controller.yaml#
26 - const: qcom,mpm
34 qcom,rpm-msg-ram:
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/linux-6.8/drivers/irqchip/
Dirq-qcom-mpm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2010-2020, The Linux Foundation. All rights reserved.
26 * This is the driver for Qualcomm MPM (MSM Power Manager) interrupt controller,
28 * Sitting in always-on domain, MPM monitors the wakeup interrupts when SoC is
30 * doesn't directly access physical MPM registers though. Instead, the access
37 * ownership and dump vMPM into physical MPM registers. On wakeup, AP is woken
38 * up by a MPM pin/interrupt, and RPM will copy STATUS registers into vMPM.
41 * vMPM register map:
44 * +--------------------------------+
46 * +--------------------------------+
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
121 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
129 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
211 bool "J-Core integrated AIC" if COMPILE_TEST
215 Support for the J-Core integrated AIC.
222 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
226 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
229 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
234 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
284 tristate "TS-4800 IRQ controller"
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/linux-6.8/drivers/pinctrl/qcom/
Dpinctrl-msm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct msm_pingroup - Qualcomm pingroup definition
39 * @grp: Generic data of the pin group (name and pins)
118 * struct msm_gpio_wakeirq_map - Map of GPIOs and their wakeup pins
120 * @wakeirq: The interrupt at the always-on interrupt controller
128 * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
129 * @pins: An array describing all pins the pin controller affects.
133 * @groups: An array describing all pin groups the pin SoC supports.
137 * @wakeirq_map: The map of wakeup capable GPIOs and the pin at PDC/MPM
143 * @egpio_func: If non-zero then this SoC supports eGPIO. Even though in
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/linux-6.8/arch/arm64/boot/dts/qcom/
Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interconnect/qcom,qcm2290.h>
16 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
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Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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