Lines Matching +full:mpm +full:- +full:pin +full:- +full:map

1 /* SPDX-License-Identifier: GPL-2.0-only */
38  * struct msm_pingroup - Qualcomm pingroup definition
39  * @grp:                  Generic data of the pin group (name and pins)
118  * struct msm_gpio_wakeirq_map - Map of GPIOs and their wakeup pins
120  * @wakeirq:       The interrupt at the always-on interrupt controller
128  * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
129  * @pins:	    An array describing all pins the pin controller affects.
133  * @groups:	    An array describing all pin groups the pin SoC supports.
137  * @wakeirq_map:    The map of wakeup capable GPIOs and the pin at PDC/MPM
143  * @egpio_func: If non-zero then this SoC supports eGPIO. Even though in
144  *              hardware this is a mux 1-level above the TLMM, we'll treat
146  *              it doesn't really map to hardware, we'll allocate a virtual