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/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
Dmt9v032.txt1 * Aptina 1/3-Inch WVGA CMOS Digital Image Sensor
3 The Aptina MT9V032 is a 1/3-inch CMOS active pixel digital image sensor with
5 two-wire serial interface.
9 - compatible: value should be either one among the following
21 - link-frequencies: List of allowed link frequencies in Hz. Each frequency is
22 expressed as a 64-bit big-endian integer.
23 - reset-gpios: GPIO handle which is connected to the reset pin of the chip.
24 - standby-gpios: GPIO handle which is connected to the standby pin of the chip.
27 Documentation/devicetree/bindings/media/video-interfaces.txt.
37 link-frequencies = /bits/ 64
Dimx219.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor
10 - Dave Stevenson <dave.stevenson@raspberrypi.com>
12 description: |-
13 The Sony imx219 is a 1/4.0-inch CMOS active pixel digital image sensor
16 Image data is sent through MIPI CSI-2, which is configured as either 2 or
30 VDIG-supply:
34 VANA-supply:
[all …]
Dov8856.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Omnivision OV8856 is a high performance, 1/4-inch, 8 megapixel, CMOS
15 image sensor that delivers 3264x2448 at 30fps. It provides full-frame,
16 sub-sampled, and windowed 10-bit MIPI images in various formats via the
18 through I2C and two-wire SCCB. The sensor output is available via CSI-2
19 serial data output (up to 4-lane).
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Dnokia,smia.txt8 Documentation/devicetree/bindings/media/video-interfaces.txt .
12 Documentation/devicetree/bindings/media/video-interfaces.txt .
15 --------------------
17 - compatible: "nokia,smia"
18 - reg: I2C address (0x10, or an alternative address)
19 - vana-supply: Analogue voltage supply (VANA), typically 2,8 volts (sensor
21 - clocks: External clock to the sensor
22 - clock-frequency: Frequency of the external clock to the sensor
23 - link-frequencies: List of allowed data link frequencies. An array of
24 64-bit elements.
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Dov2659.txt1 * OV2659 1/5-Inch 2Mp SOC Camera
3 The Omnivision OV2659 is a 1/5-inch SOC camera, with an active array size of
9 - compatible: Must be "ovti,ov2659"
10 - reg: I2C slave address
11 - clocks: reference to the xvclk input clock.
12 - clock-names: should be "xvclk".
13 - link-frequencies: target pixel clock frequency.
16 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
18 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
22 Documentation/devicetree/bindings/media/video-interfaces.txt.
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Dimx290.txt1 * Sony IMX290 1/2.8-Inch CMOS Image Sensor
3 The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with
4 Square Pixel for Color Cameras. It is programmable through I2C and 4-wire
6 Low voltage LVDS DDR output and CSI-2 serial data output. The CSI-2 bus is the
10 - compatible: Should be "sony,imx290"
11 - reg: I2C bus address of the device
12 - clocks: Reference to the xclk clock.
13 - clock-names: Should be "xclk".
14 - clock-frequency: Frequency of the xclk clock in Hz.
15 - vdddo-supply: Sensor digital IO regulator.
[all …]
Dsony,imx214.txt1 * Sony 1/3.06-Inch 13.13Mp CMOS Digital Image Sensor
3 The Sony imx214 is a 1/3.06-inch CMOS active pixel digital image sensor with
6 Image data is sent through MIPI CSI-2, through 2 or 4 lanes at a maximum
11 - compatible: Shall be "sony,imx214".
12 - reg: I2C bus address of the device. Depending on how the sensor is wired,
14 - enable-gpios: GPIO descriptor for the enable pin.
15 - vdddo-supply: Chip digital IO regulator (1.8V).
16 - vdda-supply: Chip analog regulator (2.7V).
17 - vddd-supply: Chip digital core regulator (1.12V).
18 - clocks: Reference to the xclk clock.
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/linux-5.10/drivers/soundwire/
Dmipi_disco.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
27 * sdw_master_read_prop() - Read Master properties
32 struct sdw_master_prop *prop = &bus->prop; in sdw_master_read_prop()
33 struct fwnode_handle *link; in sdw_master_read_prop() local
37 device_property_read_u32(bus->dev, in sdw_master_read_prop()
38 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
39 &prop->revision); in sdw_master_read_prop()
43 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
45 link = device_get_named_child_node(bus->dev, name); in sdw_master_read_prop()
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/linux-5.10/Documentation/driver-api/media/
Dcamera-sensor.rst1 .. SPDX-License-Identifier: GPL-2.0
6 CSI-2
7 -----
12 ---------------
17 and the link frequency. The two parameters generally are obtained from system
18 firmware. No other frequencies should be used in any circumstances.
20 The reason why the clock frequencies are so important is that the clock signals
23 elsewhere. Therefore only the pre-determined frequencies are configurable by the
27 ----------
36 processing pipeline as one or more sub-devices with different cropping and
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/linux-5.10/arch/arm64/boot/dts/renesas/
Dr8a774c0-ek874-mipi-2.1.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected with aistarvision-mipi-v2-adapter board
9 /dts-v1/;
10 #include "r8a774c0-ek874.dts"
12 #include "aistarvision-mipi-adapter-2.1.dtsi"
15 …model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875) with aistarvision-mipi-v2-ada…
16 compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0";
37 clock-lanes = <0>;
38 data-lanes = <1 2>;
39 remote-endpoint = <&ov5645_ep>;
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/linux-5.10/arch/arm/boot/dts/
Dimx6q-h100.dts4 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
45 #include "imx6qdl-sr-som.dtsi"
46 #include "imx6qdl-sr-som-brcm.dtsi"
64 stdout-path = &uart2;
67 hdmi_osc: hdmi-osc {
68 compatible = "fixed-clock";
69 clock-output-names = "hdmi-osc";
70 clock-frequency = <27000000>;
71 #clock-cells = <0>;
[all …]
Domap3-n9.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n9.dts - Device Tree file for Nokia N9
8 /dts-v1/;
10 #include "omap3-n950-n9.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "nokia,omap3-n9", "ti,omap3630", "ti,omap36xx", "ti,omap3";
23 vana-supply = <&vaux3>;
25 clock-frequency = <9600000>;
26 flash-leds = <&as3645a_flash &as3645a_indicator>;
29 link-frequencies = /bits/ 64 <199200000 210000000 499200000>;
[all …]
Domap3-n950.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950.dts - Device Tree file for Nokia N950
8 /dts-v1/;
10 #include "omap3-n950-n9.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "nokia,omap3-n950", "ti,omap3630", "ti,omap36xx", "ti,omap3";
18 compatible = "gpio-keys";
23 linux,input-type = <EV_SW>;
25 wakeup-source;
26 pinctrl-names = "default";
[all …]
/linux-5.10/drivers/media/v4l2-core/
Dv4l2-fwnode.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * formerly was located in v4l2-of.c.
11 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
27 #include <media/v4l2-async.h>
28 #include <media/v4l2-fwnode.h>
29 #include <media/v4l2-subdev.h>
54 "MIPI CSI-2 C-PHY",
58 "MIPI CSI-1",
66 "MIPI CSI-2 D-PHY",
96 return conv ? conv->mbus_type : V4L2_MBUS_UNKNOWN; in v4l2_fwnode_bus_type_to_mbus()
[all …]
/linux-5.10/include/uapi/linux/
Dwireless.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7 * Authors : Jean Tourrilhes - HPL - <jt@hpl.hp.com>
8 * Copyright (c) 1997-2007 Jean Tourrilhes, All Rights Reserved.
16 * Initial APIs (1996 -> onward) :
17 * -----------------------------
44 * New driver API (2002 -> onward) :
45 * -------------------------------
53 * Wireless Events (2002 -> onward) :
54 * --------------------------------
59 * --------------
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/linux-5.10/drivers/thermal/
Dcpufreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2012-2018 Linaro Limited.
28 * Cooling state <-> CPUFreq frequency
30 * Cooling states are translated to frequencies throughout this driver and this
36 * level 0 --> 1st Max Freq
37 * level 1 --> 2nd Max Freq
42 * struct time_in_idle - Idle time stats
52 * struct cpufreq_cooling_device - data for cooling device with cpufreq
59 * cpufreq frequencies.
64 * @node: list_head to link all cpufreq_cooling_device together.
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/linux-5.10/drivers/net/phy/
Dat803x.c1 // SPDX-License-Identifier: GPL-2.0+
22 #include <dt-bindings/net/qca-ar803x.h>
86 #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
101 * is only used for 25 MHz output, all other frequencies need the PLL.
105 * By default the PLL is only enabled if there is a link. Otherwise
221 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
222 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
223 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
224 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
225 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
[all …]
/linux-5.10/drivers/cpufreq/
Dpowernow-k8.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * (c) 2003-2006 Advanced Micro Devices, Inc.
9 u32 numps; /* number of p-states */
10 u32 batps; /* number of p-states supported on battery */
13 * vid/fid pairings, but are modified during the ->target() call
36 * handle hotplug events - so just point at cpufreq pol->cpus
53 /* Model Specific Registers for p-state transitions. MSRs are 64-bit. For */
54 /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and */
55 /* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */
85 * There are restrictions frequencies have to follow:
[all …]
/linux-5.10/include/media/
Dv4l2-fwnode.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
22 #include <media/v4l2-mediabus.h>
31 * struct v4l2_fwnode_bus_mipi_csi2 - MIPI CSI-2 bus data structure
48 * struct v4l2_fwnode_bus_parallel - parallel data bus data structure
60 * struct v4l2_fwnode_bus_mipi_csi1 - CSI-1/CCP2 data bus structure
62 * false - not inverted, true - inverted
63 * @strobe: false - data/clock, true - data/strobe
78 * struct v4l2_fwnode_endpoint - the endpoint data structure
92 * @link_frequencies: array of supported link frequencies
[all …]
/linux-5.10/drivers/gpu/drm/tegra/
Ddp.c1 // SPDX-License-Identifier: MIT
3 * Copyright (C) 2013-2019 NVIDIA Corporation
17 caps->enhanced_framing = false; in drm_dp_link_caps_reset()
18 caps->tps3_supported = false; in drm_dp_link_caps_reset()
19 caps->fast_training = false; in drm_dp_link_caps_reset()
20 caps->channel_coding = false; in drm_dp_link_caps_reset()
21 caps->alternate_scrambler_reset = false; in drm_dp_link_caps_reset()
27 dest->enhanced_framing = src->enhanced_framing; in drm_dp_link_caps_copy()
28 dest->tps3_supported = src->tps3_supported; in drm_dp_link_caps_copy()
29 dest->fast_training = src->fast_training; in drm_dp_link_caps_copy()
[all …]
/linux-5.10/include/linux/soundwire/
Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
180 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
191 * enum sdw_dpn_type - Data port types
206 * enum sdw_clk_stop_mode - Clock Stop modes
209 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
[all …]
/linux-5.10/Documentation/devicetree/bindings/media/
Dvideo-interfaces.txt4 ---------------
21 #address-cells = <1>;
22 #size-cells = <0>;
37 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
41 specify #address-cells, #size-cells properties independently for the 'port'
44 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
53 a device is partitioned into multiple data busses, e.g. 16-bit input port
54 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
55 and data-shift properties can be used to assign physical data lines to each
59 --------------------------------
[all …]
/linux-5.10/drivers/video/fbdev/matrox/
Dg450_pll.c3 * Hardware accelerated Matrox PCI cards - G450/G550 PLL control.
5 * (c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
35 return (minfo->features.pll.ref_freq * n + (m >> 1)) / m; in g450_mnp2vco()
45 f2 = f1 - f2; in pll_freq_delta()
47 f2 = f2 - f1; in pll_freq_delta()
72 p--; in g450_nextpll()
77 if (tvco < pi->vcomin) { in g450_nextpll()
97 m--; in g450_nextpll()
99 n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2; in g450_nextpll()
111 vcomax = pi->vcomax; in g450_firstpll()
[all …]
/linux-5.10/drivers/media/i2c/
Dimx290.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <media/media-entity.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-fwnode.h>
23 #include <media/v4l2-subdev.h>
106 "Horizontal Color-bar Chart",
107 "Vertical Color-bar Chart",
274 /* supported link frequencies */
292 if (imx290->nlanes == 2) in imx290_link_freqs_ptr()
[all …]

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