Lines Matching +full:link +full:- +full:frequencies
1 // SPDX-License-Identifier: GPL-2.0+
22 #include <dt-bindings/net/qca-ar803x.h>
86 #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
101 * is only used for 25 MHz output, all other frequencies need the PLL.
105 * By default the PLL is only enabled if there is a link. Otherwise
221 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
222 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
223 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
224 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
225 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
226 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
233 phy_write(phydev, MII_BMCR, context->bmcr); in at803x_context_restore()
234 phy_write(phydev, MII_ADVERTISE, context->advertise); in at803x_context_restore()
235 phy_write(phydev, MII_CTRL1000, context->control1000); in at803x_context_restore()
236 phy_write(phydev, AT803X_INTR_ENABLE, context->int_enable); in at803x_context_restore()
237 phy_write(phydev, AT803X_SMART_SPEED, context->smart_speed); in at803x_context_restore()
238 phy_write(phydev, AT803X_LED_CONTROL, context->led_control); in at803x_context_restore()
244 struct net_device *ndev = phydev->attached_dev; in at803x_set_wol()
255 return -ENODEV; in at803x_set_wol()
257 if (wol->wolopts & WAKE_MAGIC) { in at803x_set_wol()
258 mac = (const u8 *) ndev->dev_addr; in at803x_set_wol()
261 return -EINVAL; in at803x_set_wol()
290 wol->supported = WAKE_MAGIC; in at803x_get_wol()
291 wol->wolopts = 0; in at803x_get_wol()
295 wol->wolopts |= WAKE_MAGIC; in at803x_get_wol()
359 .of_match = of_match_ptr("vddio-regulator"),
372 .of_match = of_match_ptr("vddh-regulator"),
382 struct at803x_priv *priv = phydev->priv; in at8031_register_regulators()
383 struct device *dev = &phydev->mdio.dev; in at8031_register_regulators()
389 priv->vddio_rdev = devm_regulator_register(dev, &vddio_desc, &config); in at8031_register_regulators()
390 if (IS_ERR(priv->vddio_rdev)) { in at8031_register_regulators()
392 return PTR_ERR(priv->vddio_rdev); in at8031_register_regulators()
395 priv->vddh_rdev = devm_regulator_register(dev, &vddh_desc, &config); in at8031_register_regulators()
396 if (IS_ERR(priv->vddh_rdev)) { in at8031_register_regulators()
398 return PTR_ERR(priv->vddh_rdev); in at8031_register_regulators()
406 return (phydev->phy_id & phydev->drv->phy_id_mask) in at803x_match_phy_id()
407 == (phy_id & phydev->drv->phy_id_mask); in at803x_match_phy_id()
412 struct device_node *node = phydev->mdio.dev.of_node; in at803x_parse_dt()
413 struct at803x_priv *priv = phydev->priv; in at803x_parse_dt()
421 ret = of_property_read_u32(node, "qca,clk-out-frequency", &freq); in at803x_parse_dt()
437 phydev_err(phydev, "invalid qca,clk-out-frequency\n"); in at803x_parse_dt()
438 return -EINVAL; in at803x_parse_dt()
441 priv->clk_25m_reg |= FIELD_PREP(AT803X_CLK_OUT_MASK, sel); in at803x_parse_dt()
442 priv->clk_25m_mask |= AT803X_CLK_OUT_MASK; in at803x_parse_dt()
446 * mask. The upper two bits select the same frequencies. Mask in at803x_parse_dt()
457 priv->clk_25m_reg &= AT8035_CLK_OUT_MASK; in at803x_parse_dt()
458 priv->clk_25m_mask &= AT8035_CLK_OUT_MASK; in at803x_parse_dt()
462 ret = of_property_read_u32(node, "qca,clk-out-strength", &strength); in at803x_parse_dt()
464 priv->clk_25m_mask |= AT803X_CLK_OUT_STRENGTH_MASK; in at803x_parse_dt()
467 priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_FULL; in at803x_parse_dt()
470 priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_HALF; in at803x_parse_dt()
473 priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_QUARTER; in at803x_parse_dt()
476 phydev_err(phydev, "invalid qca,clk-out-strength\n"); in at803x_parse_dt()
477 return -EINVAL; in at803x_parse_dt()
485 if (of_property_read_bool(node, "qca,keep-pll-enabled")) in at803x_parse_dt()
486 priv->flags |= AT803X_KEEP_PLL_ENABLED; in at803x_parse_dt()
492 priv->vddio = devm_regulator_get_optional(&phydev->mdio.dev, in at803x_parse_dt()
494 if (IS_ERR(priv->vddio)) { in at803x_parse_dt()
496 return PTR_ERR(priv->vddio); in at803x_parse_dt()
499 ret = regulator_enable(priv->vddio); in at803x_parse_dt()
509 struct device *dev = &phydev->mdio.dev; in at803x_probe()
514 return -ENOMEM; in at803x_probe()
516 phydev->priv = priv; in at803x_probe()
523 struct at803x_priv *priv = phydev->priv; in at803x_remove()
525 if (priv->vddio) in at803x_remove()
526 regulator_disable(priv->vddio); in at803x_remove()
531 struct at803x_priv *priv = phydev->priv; in at803x_clk_out_config()
534 if (!priv->clk_25m_mask) in at803x_clk_out_config()
541 val &= ~priv->clk_25m_mask; in at803x_clk_out_config()
542 val |= priv->clk_25m_reg; in at803x_clk_out_config()
549 struct at803x_priv *priv = phydev->priv; in at8031_pll_config()
554 if (priv->flags & AT803X_KEEP_PLL_ENABLED) in at8031_pll_config()
571 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in at803x_config_init()
572 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) in at803x_config_init()
579 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in at803x_config_init()
580 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) in at803x_config_init()
616 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in at803x_config_intr()
634 * Conduct a hardware reset for AT8030 every time a link loss is in at803x_link_change_notify()
640 if (phydev->state == PHY_NOLINK && phydev->mdio.reset_gpio) { in at803x_link_change_notify()
675 /* check if the SGMII link is OK. */ in at803x_aneg_done()
677 phydev_warn(phydev, "803x_aneg_done: SGMII link is not ok\n"); in at803x_aneg_done()
688 int ss, err, old_link = phydev->link; in at803x_read_status()
690 /* Update the link, but return if there was an error */ in at803x_read_status()
696 if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) in at803x_read_status()
699 phydev->speed = SPEED_UNKNOWN; in at803x_read_status()
700 phydev->duplex = DUPLEX_UNKNOWN; in at803x_read_status()
701 phydev->pause = 0; in at803x_read_status()
702 phydev->asym_pause = 0; in at803x_read_status()
708 /* Read the AT8035 PHY-Specific Status register, which indicates the in at803x_read_status()
725 phydev->speed = SPEED_10; in at803x_read_status()
728 phydev->speed = SPEED_100; in at803x_read_status()
731 phydev->speed = SPEED_1000; in at803x_read_status()
735 phydev->duplex = DUPLEX_FULL; in at803x_read_status()
737 phydev->duplex = DUPLEX_HALF; in at803x_read_status()
740 phydev->mdix = ETH_TP_MDI_X; in at803x_read_status()
742 phydev->mdix = ETH_TP_MDI; in at803x_read_status()
746 phydev->mdix_ctrl = ETH_TP_MDI; in at803x_read_status()
749 phydev->mdix_ctrl = ETH_TP_MDI_X; in at803x_read_status()
752 phydev->mdix_ctrl = ETH_TP_MDI_AUTO; in at803x_read_status()
757 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) in at803x_read_status()
790 ret = at803x_config_mdix(phydev, phydev->mdix_ctrl); in at803x_config_aneg()
835 FIELD_PREP(AT803X_SMART_SPEED_RETRY_LIMIT_MASK, cnt - 2); in at803x_set_downshift()
844 return -EINVAL; in at803x_set_downshift()
862 switch (tuna->id) { in at803x_get_tunable()
866 return -EOPNOTSUPP; in at803x_get_tunable()
873 switch (tuna->id) { in at803x_set_tunable()
877 return -EOPNOTSUPP; in at803x_set_tunable()
1000 if (phydev->phy_id == ATH9331_PHY_ID || in at803x_cable_test_get_status()
1001 phydev->phy_id == ATH8032_PHY_ID) in at803x_cable_test_get_status()
1009 * there is no link partner or when the link partner is in at803x_cable_test_get_status()
1010 * auto-negotiating. Starting the test will restart the AN in at803x_cable_test_get_status()
1012 * get a slot where our link partner won't disturb our in at803x_cable_test_get_status()
1015 while (pair_mask && retries--) { in at803x_cable_test_get_status()
1034 /* Enable auto-negotiation, but advertise no capabilities, no link in at803x_cable_test_start()
1035 * will be established. A restart of the auto-negotiation is not in at803x_cable_test_start()
1036 * required, because the cable test will automatically break the link. in at803x_cable_test_start()
1040 if (phydev->phy_id != ATH9331_PHY_ID && in at803x_cable_test_start()
1041 phydev->phy_id != ATH8032_PHY_ID) in at803x_cable_test_start()
1130 .name = "Qualcomm Atheros AR9331 built-in PHY",