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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-larb.yaml5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
20 - mediatek,mt2701-smi-larb
21 - mediatek,mt2712-smi-larb
22 - mediatek,mt6779-smi-larb
23 - mediatek,mt6795-smi-larb
24 - mediatek,mt6893-smi-larb
25 - mediatek,mt8167-smi-larb
26 - mediatek,mt8173-smi-larb
27 - mediatek,mt8183-smi-larb
28 - mediatek,mt8186-smi-larb
[all …]
/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml42 SMI larb0 SMI larb1 ... SoCs have several SMI local arbiter(larb).
48 | | |... | | | ... There are different ports in each larb.
59 Normally we specify a local arbiter(larb) for each multimedia HW
61 in each larb. Take a example, There are many ports like MC, PP, VLD in the
65 smi-common and m4u, and additional GALS module between smi-larb and
122 Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
131 dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
132 dt-binding/memory/mt2712-larb-port.h for mt2712,
133 dt-binding/memory/mt6779-larb-port.h for mt6779,
134 dt-binding/memory/mt6795-larb-port.h for mt6795,
[all …]
/linux/include/dt-bindings/memory/
H A Dmediatek,mt8188-memory-port.h14 * the index of larb is not in order. So we reindexed these larbs from a
48 * a) Make sure all the ports inside a larb are in one range.
69 /* LARB 0 -- VDO-0 */
78 /* LARB 1 -- VD0-0 */
87 /* LARB 2 -- VDO-1 */
94 /* LARB 3 -- VDO-1 */
103 /* LARB 4 -- VPP-0 */
112 /* LARB 5 -- VPP-1 */
122 /* LARB 6 -- VPP-1 */
128 /* LARB 7 -- WPE */
[all …]
H A Dmt8186-memory-port.h17 * a) Make sure all the ports inside a larb are in one range.
32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
52 /* LARB 4 -- VDEC */
68 /* LARB 7 -- VENC */
83 /* LARB 8 -- WPE */
88 /* LARB 9 -- IMG-1 */
119 /* LARB 11 -- IMG-2 */
150 /* LARB 13 -- CAM */
[all …]
H A Dmt2701-larb-port.h12 * the first port's id for larb[N] would be the last port's id of larb[N - 1]
13 * plus one while larb[0]'s first port number is 0. The definition of
16 * offset for each larb, the first port's id for larb[N] would be (N * 32).
H A Dmtk-memory-port.h11 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) argument
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi10 #include <dt-bindings/memory/mt2701-larb-port.h>
59 larb0: larb@14010000 {
60 compatible = "mediatek,mt7623-smi-larb",
61 "mediatek,mt2701-smi-larb";
64 mediatek,larb-id = <0>;
71 larb1: larb@16010000 {
72 compatible = "mediatek,mt7623-smi-larb",
73 "mediatek,mt2701-smi-larb";
76 mediatek,larb-id = <1>;
83 larb2: larb@15001000 {
[all …]
H A Dmt2701.dtsi13 #include <dt-bindings/memory/mt2701-larb-port.h>
529 larb0: larb@14010000 {
530 compatible = "mediatek,mt2701-smi-larb";
533 mediatek,larb-id = <0>;
546 larb2: larb@15001000 {
547 compatible = "mediatek,mt2701-smi-larb";
550 mediatek,larb-id = <2>;
588 larb1: larb@16010000 {
589 compatible = "mediatek,mt2701-smi-larb";
592 mediatek,larb-id = <1>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8167.dtsi9 #include <dt-bindings/memory/mt8167-larb-port.h>
142 larb0: larb@14016000 {
143 compatible = "mediatek,mt8167-smi-larb";
152 larb1: larb@15001000 {
153 compatible = "mediatek,mt8167-smi-larb";
162 larb2: larb@16010000 {
163 compatible = "mediatek,mt8167-smi-larb";
H A Dmt8195.dtsi689 clock-names = "venc0-larb";
698 clock-names = "venc1-larb";
2212 larb4: larb@14013000 {
2213 compatible = "mediatek,mt8195-smi-larb";
2215 mediatek,larb-id = <4>;
2255 larb7: larb@14e04000 {
2256 compatible = "mediatek,mt8195-smi-larb";
2258 mediatek,larb-id = <7>;
2266 larb8: larb@14e05000 {
2267 compatible = "mediatek,mt8195-smi-larb";
[all …]
H A Dmt2712e.dtsi11 #include <dt-bindings/memory/mt2712-larb-port.h>
1000 larb0: larb@14021000 {
1001 compatible = "mediatek,mt2712-smi-larb";
1004 mediatek,larb-id = <0>;
1020 larb4: larb@14027000 {
1021 compatible = "mediatek,mt2712-smi-larb";
1024 mediatek,larb-id = <4>;
1031 larb5: larb@14030000 {
1032 compatible = "mediatek,mt2712-smi-larb";
1035 mediatek,larb-id = <5>;
[all …]
H A Dmt8192.dtsi12 #include <dt-bindings/memory/mt8192-larb-port.h>
1484 larb0: larb@14003000 {
1485 compatible = "mediatek,mt8192-smi-larb";
1487 mediatek,larb-id = <0>;
1494 larb1: larb@14004000 {
1495 compatible = "mediatek,mt8192-smi-larb";
1497 mediatek,larb-id = <1>;
1670 larb9: larb@1502e000 {
1671 compatible = "mediatek,mt8192-smi-larb";
1673 mediatek,larb-id = <9>;
[all …]
H A Dmt8365.dtsi13 #include <dt-bindings/memory/mediatek,mt8365-larb-port.h>
800 larb0: larb@14003000 {
801 compatible = "mediatek,mt8365-smi-larb",
802 "mediatek,mt8186-smi-larb";
809 mediatek,larb-id = <0>;
1102 larb2: larb@15001000 {
1103 compatible = "mediatek,mt8365-smi-larb",
1104 "mediatek,mt8186-smi-larb";
1111 mediatek,larb-id = <2>;
1120 larb3: larb@16010000 {
[all …]
H A Dmt8186.dtsi1009 clock-names = "vdec0", "larb";
1079 clock-names = "venc0", "subsys-larb";
1090 "subsys-larb-ck",
1091 "subsys-larb-pclk";
1801 compatible = "mediatek,mt8186-smi-larb";
1806 mediatek,larb-id = <0>;
1812 compatible = "mediatek,mt8186-smi-larb";
1817 mediatek,larb-id = <1>;
1975 compatible = "mediatek,mt8186-smi-larb";
1980 mediatek,larb-id = <8>;
[all …]
H A Dmt6795.dtsi13 #include <dt-bindings/memory/mt6795-larb-port.h>
937 larb0: larb@14021000 {
938 compatible = "mediatek,mt6795-smi-larb";
943 mediatek,larb-id = <0>;
962 larb2: larb@15001000 {
963 compatible = "mediatek,mt6795-smi-larb";
968 mediatek,larb-id = <2>;
978 larb1: larb@16010000 {
979 compatible = "mediatek,mt6795-smi-larb";
982 mediatek,larb-id = <1>;
[all …]
H A Dmt8173.dtsi10 #include <dt-bindings/memory/mt8173-larb-port.h>
1297 larb0: larb@14021000 {
1298 compatible = "mediatek,mt8173-smi-larb";
1355 larb4: larb@14027000 {
1356 compatible = "mediatek,mt8173-smi-larb";
1371 larb2: larb@15001000 {
1372 compatible = "mediatek,mt8173-smi-larb";
1441 larb1: larb@16010000 {
1442 compatible = "mediatek,mt8173-smi-larb";
1457 larb3: larb@18001000 {
[all …]
H A Dmt8183.dtsi12 #include <dt-bindings/memory/mt8183-larb-port.h>
1871 larb0: larb@14017000 {
1872 compatible = "mediatek,mt8183-smi-larb";
1907 larb5: larb@15021000 {
1908 compatible = "mediatek,mt8183-smi-larb";
1917 larb2: larb@1502f000 {
1918 compatible = "mediatek,mt8183-smi-larb";
1963 larb1: larb@16010000 {
1964 compatible = "mediatek,mt8183-smi-larb";
1978 larb4: larb@17010000 {
[all …]
/linux/drivers/iommu/
H A Dmtk_iommu_v1.c31 #include <dt-bindings/memory/mt2701-larb-port.h>
166 int larb = mt2701_m4u_to_larb(id); in mt2701_m4u_to_port() local
168 return id - mt2701_m4u_in_larb[larb]; in mt2701_m4u_to_port()
228 "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d\n", in mtk_iommu_v1_isr()
486 /* Link the consumer device with the smi-larb device(supplier) */ in mtk_iommu_v1_probe_device()
494 dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", in mtk_iommu_v1_probe_device()
/linux/drivers/clk/mediatek/
H A Dclk-mt8188-ipe.c33 /* Reset for SMI larb 12 */
/linux/Documentation/devicetree/bindings/media/
H A Dmediatek-jpeg-encoder.yaml63 #include <dt-bindings/memory/mt2701-larb-port.h>
H A Dmediatek-jpeg-decoder.yaml69 #include <dt-bindings/memory/mt2701-larb-port.h>
H A Dmediatek,vcodec-subdev-decoder.yaml61 LAT-SoC refers to another hardware block that connected to additional LARB
218 #include <dt-bindings/memory/mt8192-larb-port.h>
H A Dmediatek,mdp3-wrot.yaml78 #include <dt-bindings/memory/mt8183-larb-port.h>
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,wdma.yaml70 #include <dt-bindings/memory/mt8183-larb-port.h>
/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,wdma.yaml74 #include <dt-bindings/memory/mt8173-larb-port.h>

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