Searched +full:ipq5018 +full:- +full:gcc (Results 1 – 11 of 11) sorted by relevance
/linux-6.15/Documentation/devicetree/bindings/clock/ |
D | qcom,ipq5018-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on IPQ5018 10 - Sricharan Ramabadhran <quic_srichara@quicinc.com> 14 domains on IPQ5018 17 include/dt-bindings/clock/qcom,ipq5018-gcc.h 18 include/dt-bindings/reset/qcom,ipq5018-gcc.h 22 const: qcom,gcc-ipq5018 [all …]
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/linux-6.15/arch/arm64/boot/dts/qcom/ |
D | ipq5018.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 3 * IPQ5018 SoC device tree source 8 #include <dt-bindings/clock/qcom,apss-ipq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/qcom,gcc-ipq5018.h> 11 #include <dt-bindings/reset/qcom,gcc-ipq5018.h> 14 interrupt-parent = <&intc>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 sleep_clk: sleep-clk { [all …]
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/linux-6.15/Documentation/devicetree/bindings/phy/ |
D | qcom,ipq5332-usb-hsphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sricharan Ramabadhran <quic_srichara@quicinc.com> 11 - Varadarajan Narayanan <quic_varada@quicinc.com> 15 IPQ5018, IPQ5332 SoCs. 20 - enum: 21 - qcom,ipq5018-usb-hsphy 22 - qcom,ipq5332-usb-hsphy [all …]
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/linux-6.15/Documentation/devicetree/bindings/usb/ |
D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 15 - enum: 16 - qcom,ipq4019-dwc3 17 - qcom,ipq5018-dwc3 18 - qcom,ipq5332-dwc3 19 - qcom,ipq5424-dwc3 20 - qcom,ipq6018-dwc3 [all …]
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/linux-6.15/Documentation/devicetree/bindings/nvmem/ |
D | qcom,qfprom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 - $ref: nvmem.yaml# 14 - $ref: nvmem-deprecated-cells.yaml# 19 - enum: 20 - qcom,apq8064-qfprom 21 - qcom,apq8084-qfprom 22 - qcom,ipq5018-qfprom [all …]
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/linux-6.15/Documentation/devicetree/bindings/mailbox/ |
D | qcom,apcs-kpss-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Jassi Brar <jassisinghbrar@gmail.com> 19 - items: 20 - enum: 21 - qcom,ipq5018-apcs-apps-global 22 - qcom,ipq5332-apcs-apps-global 23 - qcom,ipq5424-apcs-apps-global [all …]
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/linux-6.15/Documentation/devicetree/bindings/firmware/ |
D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 [all …]
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/linux-6.15/drivers/clk/qcom/ |
D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies 207 the output clocks to the networking hardware and GCC blocks. 219 tristate "IPQ5018 Global Clock Controller" 222 Support for global clock controller on ipq5018 devices. 1294 Say Y if you want to toggle LPASS-adjacent resets within 1393 tristate "High-Frequency PLL (HFPLL) Clock Controller" 1395 Support for the high-frequency PLLs present on Qualcomm devices. 1402 Support for the Krait ACC and GCC clock controllers. Say Y
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D | gcc-ipq5018.c | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 5 #include <linux/clk-provider.h> 11 #include <dt-bindings/clock/qcom,gcc-ipq5018.h> 12 #include <dt-bindings/reset/qcom,gcc-ipq5018.h> 14 #include "clk-alpha-pll.h" 15 #include "clk-branch.h" 16 #include "clk-rcg.h" 17 #include "clk-regmap.h" 18 #include "clk-regmap-divider.h" 19 #include "clk-regmap-mux.h" [all …]
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/linux-6.15/Documentation/devicetree/bindings/mmc/ |
D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 20 - enum: 21 - qcom,sdhci-msm-v4 23 - items: [all …]
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