/linux-3.3/drivers/dma/ipu/ |
D | ipu_irq.c | 23 * Register read / write - shall be inlined by the compiler 27 return __raw_readl(ipu->reg_ipu + reg); in ipu_read_reg() 32 __raw_writel(value, ipu->reg_ipu + reg); in ipu_write_reg() 99 struct ipu_irq_map *map = irq_data_get_irq_chip_data(d); in ipu_irq_unmask() local 106 bank = map->bank; in ipu_irq_unmask() 109 pr_err("IPU: %s(%u) - unmapped!\n", __func__, d->irq); in ipu_irq_unmask() 113 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_unmask() 114 reg |= (1UL << (map->source & 31)); in ipu_irq_unmask() 115 ipu_write_reg(bank->ipu, reg, bank->control); in ipu_irq_unmask() 122 struct ipu_irq_map *map = irq_data_get_irq_chip_data(d); in ipu_irq_mask() local [all …]
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/linux-3.3/arch/c6x/include/asm/ |
D | irq.h | 18 #include <linux/radix-tree.h> 26 * These interrupt vectors are prioritized with IRQ 4 having the highest 31 * feed into one of the 12 general interrupt vectors. The remaining 8 vectors 32 * can each route a single SoC interrupt directly. 41 /* This number is used when no interrupt has been assigned */ 44 /* This type is the placeholder for a hardware interrupt number. It has to 50 /* Interrupt controller "host" data structure. This could be defined as a 52 * and virtual interrupt numbers for a given interrupt domain. The host 59 * we use an open firmware device-tree. We do have references to struct 61 * a given interrupt controller node, and of course as an argument to its [all …]
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/linux-3.3/arch/powerpc/boot/dts/ |
D | makalu.dts | 11 /dts-v1/; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 28 #address-cells = <1>; 29 #size-cells = <0>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; 38 d-cache-line-size = <32>; [all …]
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D | katmai.dts | 15 /dts-v1/; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 dcr-parent = <&{/cpus/cpu@0}>; 32 #address-cells = <1>; 33 #size-cells = <0>; 39 clock-frequency = <0>; /* Filled in by zImage */ 40 timebase-frequency = <0>; /* Filled in by zImage */ 41 i-cache-line-size = <32>; 42 d-cache-line-size = <32>; [all …]
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D | kilauea.dts | 4 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 11 /dts-v1/; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 28 #address-cells = <1>; 29 #size-cells = <0>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; [all …]
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D | rainier.dts | 15 /dts-v1/; 18 #address-cells = <2>; 19 #size-cells = <1>; 22 dcr-parent = <&{/cpus/cpu@0}>; 34 #address-cells = <1>; 35 #size-cells = <0>; 41 clock-frequency = <0>; /* Filled in by zImage */ 42 timebase-frequency = <0>; /* Filled in by zImage */ 43 i-cache-line-size = <32>; 44 d-cache-line-size = <32>; [all …]
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D | glacier.dts | 4 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 30 #address-cells = <1>; 31 #size-cells = <0>; 37 clock-frequency = <0>; /* Filled in by U-Boot */ 38 timebase-frequency = <0>; /* Filled in by U-Boot */ 39 i-cache-line-size = <32>; [all …]
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D | canyonlands.dts | 4 * Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 28 #address-cells = <1>; 29 #size-cells = <0>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; [all …]
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D | icon.dts | 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 dcr-parent = <&{/cpus/cpu@0}>; 28 #address-cells = <1>; 29 #size-cells = <0>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; 38 d-cache-line-size = <32>; [all …]
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D | redwood.dts | 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 26 #address-cells = <1>; 27 #size-cells = <0>; 33 clock-frequency = <0>; /* Filled in by U-Boot */ 34 timebase-frequency = <0>; /* Filled in by U-Boot */ 35 i-cache-line-size = <32>; 36 d-cache-line-size = <32>; [all …]
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D | sequoia.dts | 15 /dts-v1/; 18 #address-cells = <2>; 19 #size-cells = <1>; 22 dcr-parent = <&{/cpus/cpu@0}>; 34 #address-cells = <1>; 35 #size-cells = <0>; 41 clock-frequency = <0>; /* Filled in by zImage */ 42 timebase-frequency = <0>; /* Filled in by zImage */ 43 i-cache-line-size = <32>; 44 d-cache-line-size = <32>; [all …]
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D | haleakala.dts | 11 /dts-v1/; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 27 #address-cells = <1>; 28 #size-cells = <0>; 34 clock-frequency = <0>; /* Filled in by U-Boot */ 35 timebase-frequency = <0>; /* Filled in by U-Boot */ 36 i-cache-line-size = <32>; 37 d-cache-line-size = <32>; [all …]
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D | eiger.dts | 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <1>; 18 dcr-parent = <&{/cpus/cpu@0}>; 30 #address-cells = <1>; 31 #size-cells = <0>; 37 clock-frequency = <0>; /* Filled in by U-Boot */ 38 timebase-frequency = <0>; /* Filled in by U-Boot */ 39 i-cache-line-size = <32>; 40 d-cache-line-size = <32>; [all …]
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/linux-3.3/drivers/base/regmap/ |
D | regmap-irq.c | 16 #include <linux/interrupt.h> 24 struct regmap *map; member 39 return &data->chip->irqs[irq - data->irq_base]; in irq_to_regmap_irq() 46 mutex_lock(&d->lock); in regmap_irq_lock() 59 for (i = 0; i < d->chip->num_regs; i++) { in regmap_irq_sync_unlock() 60 ret = regmap_update_bits(d->map, d->chip->mask_base + i, in regmap_irq_sync_unlock() 61 d->mask_buf_def[i], d->mask_buf[i]); in regmap_irq_sync_unlock() 63 dev_err(d->map->dev, "Failed to sync masks in %x\n", in regmap_irq_sync_unlock() 64 d->chip->mask_base + i); in regmap_irq_sync_unlock() 67 mutex_unlock(&d->lock); in regmap_irq_sync_unlock() [all …]
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/linux-3.3/arch/powerpc/include/asm/ |
D | irq.h | 14 #include <linux/radix-tree.h> 26 /* This number is used when no interrupt has been assigned */ 30 * no interrupt happened _and_ ignore it (don't count it as bad). Some 33 #define NO_IRQ_IGNORE ((unsigned int)-1) 44 /* This type is the placeholder for a hardware interrupt number. It has to 50 /* Interrupt controller "host" data structure. This could be defined as a 52 * and virtual interrupt numbers for a given interrupt domain. The host 59 * we use an open firmware device-tree. We do have references to struct 61 * a given interrupt controller node, and of course as an argument to its 62 * counterpart host->ops->match() callback. However, those are treated as [all …]
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/linux-3.3/drivers/of/ |
D | irq.c | 5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 7 * Copyright (C) 1996-2001 Cort Dougan 17 * device tree to actual irq numbers on an interrupt controller 30 * irq_of_parse_and_map - Parse and map an interrupt into linux virq space 31 * @device: Device node of the device whose interrupt is to be mapped 32 * @index: Index of the interrupt to map 50 * of_irq_find_parent - Given a device node, find its interrupt parent node 53 * Returns a pointer to the interrupt parent node, or NULL if the interrupt 65 parp = of_get_property(child, "interrupt-parent", NULL); in of_irq_find_parent() 76 } while (p && of_get_property(p, "#interrupt-cells", NULL) == NULL); in of_irq_find_parent() [all …]
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/linux-3.3/arch/powerpc/boot/dts/fsl/ |
D | p1010si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,ifc", "simple-bus"; 44 compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; 46 #size-cells = <2>; 47 #address-cells = <3>; 48 bus-range = <0 255>; 49 clock-frequency = <33333333>; 54 #interrupt-cells = <1>; 55 #size-cells = <2>; [all …]
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D | mpc8544si-post.dtsi | 36 #address-cells = <2>; 37 #size-cells = <1>; 38 compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus"; 44 compatible = "fsl,mpc8540-pci"; 47 bus-range = <0 0xff>; 48 #interrupt-cells = <1>; 49 #size-cells = <2>; 50 #address-cells = <3>; 55 compatible = "fsl,mpc8548-pcie"; 57 #size-cells = <2>; [all …]
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/linux-3.3/drivers/pcmcia/ |
D | pd6729.c | 2 * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. 16 #include <linux/interrupt.h> 29 MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge"); 30 MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>"); 47 * Specifies the interrupt delivery mode. The default (1) is to use PCI 52 static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */ 56 "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1"); 70 reg += socket->number * 0x40; in indirect_read() 71 port = socket->io_base; in indirect_read() 87 reg = reg + socket->number * 0x40; in indirect_read16() [all …]
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D | i82092.c | 2 * Driver for Intel I82092AA PCI-PCMCIA bridge. 7 * Loosly based on i82365.c from the pcmcia-cs package 15 #include <linux/interrupt.h> 101 ret = -EIO; in i82092aa_pci_probe() 107 ret = -EBUSY; in i82092aa_pci_probe() 117 sockets[i].socket.pci_irq = dev->irq; in i82092aa_pci_probe() 132 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */ in i82092aa_pci_probe() 133 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */ in i82092aa_pci_probe() 135 /* Register the interrupt handler */ in i82092aa_pci_probe() 136 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq); in i82092aa_pci_probe() [all …]
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/linux-3.3/arch/powerpc/sysdev/ |
D | xilinx_intc.c | 2 * Interrupt controller driver for Xilinx Virtex FPGAs 13 * This is a driver for the interrupt controller typically found in 16 * The interrupt sense levels are hard coded into the FPGA design with 34 #define XINTC_ISR 0 /* Interrupt Status */ 35 #define XINTC_IPR 4 /* Interrupt Pending */ 36 #define XINTC_IER 8 /* Interrupt Enable */ 37 #define XINTC_IAR 12 /* Interrupt Acknowledge */ 38 #define XINTC_SIE 16 /* Set Interrupt Enable bits */ 39 #define XINTC_CIE 20 /* Clear Interrupt Enable bits */ 40 #define XINTC_IVR 24 /* Interrupt Vector */ [all …]
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/linux-3.3/arch/c6x/platforms/ |
D | megamod-pic.c | 2 * Support for C64x+ Megamodule Interrupt Controller 12 #include <linux/interrupt.h> 19 #include <asm/megamod-pic.h> 27 * Megamodule Interrupt Controller register layout 72 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in mask_megamod() 74 raw_spin_lock(&pic->lock); in mask_megamod() 76 raw_spin_unlock(&pic->lock); in mask_megamod() 83 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in unmask_megamod() 85 raw_spin_lock(&pic->lock); in unmask_megamod() 87 raw_spin_unlock(&pic->lock); in unmask_megamod() [all …]
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/linux-3.3/arch/blackfin/mach-bf548/include/mach/ |
D | defBF54x_base.h | 2 * Copyright 2007-2010 Analog Devices Inc. 4 * Licensed under the ADI BSD license or the GPL-2 (or later) 12 /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x */ 23 /* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */ 31 /* System Reset and Interrupt Controller (0xFFC00100 - 0xFFC00104) */ 39 #define SIC_IMASK0 0xffc0010c /* System Interrupt Mask Register 0 */ 40 #define SIC_IMASK1 0xffc00110 /* System Interrupt Mask Register 1 */ 41 #define SIC_IMASK2 0xffc00114 /* System Interrupt Mask Register 2 */ 42 #define SIC_ISR0 0xffc00118 /* System Interrupt Status Register 0 */ 43 #define SIC_ISR1 0xffc0011c /* System Interrupt Status Register 1 */ [all …]
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/linux-3.3/include/linux/ |
D | regmap.h | 5 * Register map access API 44 * Configuration for the register map of a device. 57 * (eg, a clear on read interrupt status register). 105 * Description of a hardware bus for the register map infrastructure. 108 * @gather_write: Write operation with split register/value, return -ENOTSUPP 130 void regmap_exit(struct regmap *map); 131 int regmap_reinit_cache(struct regmap *map, 133 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); 134 int regmap_raw_write(struct regmap *map, unsigned int reg, 136 int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); [all …]
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/linux-3.3/arch/ia64/sn/pci/ |
D | tioce_provider.c | 6 * Copyright (C) 2003-2006 Silicon Graphics, Inc. All Rights Reserved. 10 #include <linux/interrupt.h> 48 * TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the 50 * spaces from table 2-1 of the "CE Programmer's Reference Overview" document. 61 if (kern->ce_common->ce_rev != TIOCE_REV_A) in tioce_mmr_war_pre() 64 mmr_base = kern->ce_common->ce_pcibus.bs_base; in tioce_mmr_war_pre() 65 mmr_offset = (unsigned long)mmr_addr - mmr_base; in tioce_mmr_war_pre() 87 if (kern->ce_common->ce_rev != TIOCE_REV_A) in tioce_mmr_war_post() 90 mmr_base = kern->ce_common->ce_pcibus.bs_base; in tioce_mmr_war_post() 91 mmr_offset = (unsigned long)mmr_addr - mmr_base; in tioce_mmr_war_post() [all …]
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