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/linux-5.10/Documentation/devicetree/bindings/net/
Dfsl-enetc.txt4 external) there are two supported link modes specified by
9 - reg : Specifies PCIe Device Number and Function
12 - compatible : Should be "fsl,enetc".
18 In this case, the ENETC node should include a "mdio" sub-node
19 that in turn should contain the "ethernet-phy" node describing the
26 - phy-handle : Phandle to a PHY on the MDIO bus.
29 - phy-connection-type : Defined in ethernet.txt.
31 - mdio : "mdio" node, defined in mdio.txt.
33 - ethernet-phy : "ethernet-phy" node, defined in phy.txt.
40 phy-handle = <&sgmii_phy0>;
[all …]
Dnixge.txt4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
16 - nvmem-cell-names: Should be "address"
[all …]
Dbrcm,systemport.txt4 - compatible: should be one of:
5 "brcm,systemport-v1.00"
6 "brcm,systemportlite-v1.00" or
8 - reg: address and length of the register set for the device.
9 - interrupts: interrupts for the device, first cell must be for the rx
11 optional third interrupt cell for Wake-on-LAN can be specified
12 - local-mac-address: Ethernet MAC address (48 bits) of this adapter
13 - phy-mode: Should be a string describing the PHY interface to the
15 - fixed-link: see Documentation/devicetree/bindings/net/fixed-link.txt for
19 - systemport,num-tier2-arb: number of tier 2 arbiters, an integer
[all …]
Dbrcm,bcmgenet.txt4 - compatible: should contain one of "brcm,genet-v1", "brcm,genet-v2",
5 "brcm,genet-v3", "brcm,genet-v4", "brcm,genet-v5", "brcm,bcm2711-genet-v5".
6 - reg: address and length of the register set for the device
7 - interrupts and/or interrupts-extended: must be two cells, the first cell
10 optional third interrupt cell for Wake-on-LAN can be specified.
11 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
13 - phy-mode: see ethernet.txt file in the same directory
14 - #address-cells: should be 1
15 - #size-cells: should be 1
18 - clocks: When provided, must be two phandles to the functional clocks nodes
[all …]
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
[all …]
/linux-5.10/Documentation/devicetree/bindings/net/dsa/
Dqca8k.txt5 - compatible: should be one of:
9 - #size-cells: must be 0
10 - #address-cells: must be 1
14 - reset-gpios: GPIO to be used to reset the whole device
20 mdio-bus each subnode describing a port needs to have a valid phandle
24 Don't use mixed external and internal mdio-bus configurations, as this is
31 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
33 Documentation/devicetree/bindings/net/fixed-link.txt
36 For QCA8K the 'fixed-link' sub-node supports only the following properties:
38 - 'speed' (integer, mandatory), to indicate the link speed. Accepted
[all …]
Dsja1105.txt6 - compatible:
8 - "nxp,sja1105e"
9 - "nxp,sja1105t"
10 - "nxp,sja1105p"
11 - "nxp,sja1105q"
12 - "nxp,sja1105r"
13 - "nxp,sja1105s"
18 and the non-SGMII devices, while pin-compatible, are not equal in terms
24 - sja1105,role-mac:
25 - sja1105,role-phy:
[all …]
Docelot.txt5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
27 5 are fixed as internal ports in the NXP LS1028A instantiation.
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
39 Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled
40 by default, and should be enabled on a per-board basis). But if any external
[all …]
Dlan9303.txt2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
23 auto-detected and mapped accordingly.
31 fixed-link { /* RMII fixed link to LAN9303 */
33 full-duplex;
38 compatible = "smsc,lan9303-i2c";
[all …]
Dksz.txt6 - compatible: For external switch chips, compatible string must be exactly one
8 - "microchip,ksz8765"
9 - "microchip,ksz8794"
10 - "microchip,ksz8795"
11 - "microchip,ksz9477"
12 - "microchip,ksz9897"
13 - "microchip,ksz9896"
14 - "microchip,ksz9567"
15 - "microchip,ksz8565"
16 - "microchip,ksz9893"
[all …]
/linux-5.10/drivers/net/phy/
Dfixed_phy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Fixed MDIO bus (MDIO bus emulation with fixed PHYs)
8 * Copyright (c) 2006-2007 MontaVista Software, Inc.
51 struct phy_device *phydev = dev->phydev; in fixed_phy_change_carrier()
54 if (!phydev || !phydev->mdio.bus) in fixed_phy_change_carrier()
55 return -EINVAL; in fixed_phy_change_carrier()
57 list_for_each_entry(fp, &fmb->phys, node) { in fixed_phy_change_carrier()
58 if (fp->addr == phydev->mdio.addr) { in fixed_phy_change_carrier()
59 fp->no_carrier = !new_carrier; in fixed_phy_change_carrier()
63 return -EINVAL; in fixed_phy_change_carrier()
[all …]
Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
38 * struct phylink - internal data type for phylink
55 u8 link_port; /* The current non-phy ethtool port */
58 /* The link configuration settings */
84 if ((pl)->config->type == PHYLINK_NETDEV) \
85 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
86 else if ((pl)->config->type == PHYLINK_DEV) \
87 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
99 if ((pl)->config->type == PHYLINK_NETDEV) \
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 PHYlink models the link between the PHY and MAC, allowing fixed
32 bool "Support LED triggers for tracking link state"
35 Adds support for a set of LED trigger events per-PHY. Link
37 LED class driver. There are triggers for each link speed currently
38 supported by the PHY and also a one common "link" trigger as a
39 logical-or of all the link speed ones.
44 <Speed in megabits>Mbps OR <Speed in gigabits>Gbps OR link
49 tristate "MDIO Bus/PHY emulation with fixed speed/link PHYs"
53 Adds the platform "fixed" MDIO Bus to cover the boards that use
[all …]
/linux-5.10/Documentation/networking/
Dsfp-phylink.rst1 .. SPDX-License-Identifier: GPL-2.0
10 phylink is a mechanism to support hot-pluggable networking modules
11 directly connected to a MAC without needing to re-initialise the
12 adapter on hot-plug events.
14 phylink supports conventional phylib-based setups, fixed link setups
25 In PHY mode, we use phylib to read the current link settings from
28 negotiation being enabled on the link.
30 2. Fixed mode
32 Fixed mode is the same as PHY mode as far as the MAC driver is
35 3. In-band mode
[all …]
/linux-5.10/arch/arm/boot/dts/
Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
[all …]
Dimx53-kp-hsc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "imx53-kp.dtsi"
12 compatible = "kiebackpeter,imx53-hsc", "fsl,imx53";
18 fixed-link { /* RMII fixed link to LAN9303 */
20 full-duplex;
26 compatible = "smsc,lan9303-i2c";
28 reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
29 reset-duration = <400>;
32 #address-cells = <1>;
[all …]
Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
[all …]
/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-odroid-n2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/gpio/meson-g12a-gpio.h>
9 #include <dt-bindings/sound/meson-g12a-toacodec.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
18 dioo2133: audio-amplifier-0 {
19 compatible = "simple-audio-amplifier";
20 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
21 VCC-supply = <&vcc_5v>;
22 sound-name-prefix = "U19";
[all …]
Dmeson-gx-p23x-q20x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * the pin-compatible S912 (GXM) or S905D (GXL) SoCs.
11 #include <dt-bindings/sound/meson-aiu.h>
19 dio2133: analog-amplifier {
20 compatible = "simple-audio-amplifier";
21 sound-name-prefix = "AU2";
22 VCC-supply = <&hdmi_5v>;
23 enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
26 spdif_dit: audio-codec-0 {
27 #sound-dai-cells = <0>;
[all …]
Dmeson-axg-s400.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-axg.dtsi"
9 #include <dt-bindings/input/input.h>
12 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-next {
[all …]
Dmeson-g12a-x96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
14 compatible = "amediatech,x96-max", "amlogic,g12a";
22 spdif_dit: audio-codec-1 {
23 #sound-dai-cells = <0>;
24 compatible = "linux,spdif-dit";
[all …]
Dmeson-gxl-s805x-libretech-ac.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-gxl-s805x.dtsi"
16 compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
17 "amlogic,meson-gxl";
18 model = "Libre Computer AML-S805X-AC";
27 stdout-path = "serial0:115200n8";
30 cvbs-connector {
[all …]
/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
[all …]
/linux-5.10/drivers/net/mdio/
Dof_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
29 * ethernet-phy-idAAAA.BBBB */
37 if (sscanf(cp, "ethernet-phy-id%4x.%4x", &upper, &lower) == 2) { in of_get_phy_id()
42 return -EINVAL; in of_get_phy_id()
52 if (err == -ENOENT) in of_find_mii_timestamper()
58 return ERR_PTR(-EINVAL); in of_find_mii_timestamper()
69 if (rc == -EPROBE_DEFER) in of_mdiobus_phy_device_register()
73 phy->irq = rc; in of_mdiobus_phy_device_register()
74 mdio->irq[addr] = rc; in of_mdiobus_phy_device_register()
76 phy->irq = mdio->irq[addr]; in of_mdiobus_phy_device_register()
[all …]
/linux-5.10/arch/mips/boot/dts/cavium-octeon/
Ddlink_dsr-500n-1000n.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device tree source for D-Link DSR-500N/1000N (common parts).
13 phy8: ethernet-phy@8 {
15 compatible = "ethernet-phy-ieee802.3-c22";
22 fixed-link {
24 full-duplex;
28 fixed-link {
30 full-duplex;
34 phy-handle = <&phy8>;
47 refclk-frequency = <12000000>;
[all …]

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