Lines Matching +full:fixed +full:- +full:link
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 pinctrl-0 = <&pinctrl_gpio_switch0>;
33 pinctrl-names = "default";
36 interrupt-parent = <&gpio0>;
38 interrupt-controller;
39 #interrupt-cells = <2>;
40 eeprom-length = <512>;
43 #address-cells = <1>;
44 #size-cells = <0>;
49 phy-handle = <&switch0phy0>;
55 phy-handle = <&switch0phy1>;
61 phy-handle = <&switch0phy2>;
67 phy-mode = "rgmii-txid";
68 link = <&switch1port6
70 fixed-link {
72 full-duplex;
81 fixed-link {
83 full-duplex;
88 #address-cells = <1>;
89 #size-cells = <0>;
92 interrupt-parent = <&switch0>;
97 interrupt-parent = <&switch0>;
102 interrupt-parent = <&switch0>;
111 #address-cells = <1>;
112 #size-cells = <0>;
116 pinctrl-0 = <&pinctrl_gpio_switch1>;
117 pinctrl-names = "default";
120 interrupt-parent = <&gpio0>;
122 interrupt-controller;
123 #interrupt-cells = <2>;
124 eeprom-length = <512>;
127 #address-cells = <1>;
128 #size-cells = <0>;
133 phy-handle = <&switch1phy0>;
139 phy-handle = <&switch1phy1>;
145 phy-handle = <&switch1phy2>;
151 link = <&switch2port9>;
152 phy-mode = "rgmii-txid";
154 fixed-link {
156 full-duplex;
163 phy-mode = "rgmii-txid";
164 link = <&switch0port5>;
165 fixed-link {
167 full-duplex;
172 #address-cells = <1>;
173 #size-cells = <0>;
177 interrupt-parent = <&switch1>;
183 interrupt-parent = <&switch1>;
189 interrupt-parent = <&switch1>;
197 #address-cells = <1>;
198 #size-cells = <0>;
207 #address-cells = <1>;
208 #size-cells = <0>;
213 phy-handle = <&switch2phy0>;
219 phy-handle = <&switch2phy1>;
225 phy-handle = <&switch2phy2>;
232 fixed-link {
234 full-duplex;
235 link-gpios = <&gpio6 2
244 fixed-link {
246 full-duplex;
247 link-gpios = <&gpio6 3
255 phy-mode = "rgmii-txid";
256 link = <&switch1port5
259 fixed-link {
261 full-duplex;
266 #address-cells = <1>;
267 #size-cells = <0>;
284 #address-cells = <1>;
285 #size-cells = <0>;
290 compatible = "spi-gpio";
291 pinctrl-0 = <&pinctrl_gpio_spi0>;
292 pinctrl-names = "default";
293 #address-cells = <1>;
294 #size-cells = <0>;
295 gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
296 gpio-mosi = <&gpio1 11 GPIO_ACTIVE_HIGH>;
297 gpio-miso = <&gpio1 10 GPIO_ACTIVE_HIGH>;
298 cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW
300 num-chipselects = <2>;
303 compatible = "m25p128", "jedec,spi-nor";
304 #address-cells = <1>;
305 #size-cells = <1>;
307 spi-max-frequency = <1000000>;
312 pinctrl-0 = <&pinctrl_gpio_e6185_eeprom_sel>;
313 pinctrl-names = "default";
314 #address-cells = <0>;
315 #size-cells = <0>;
317 spi-max-frequency = <500000>;
318 spi-cs-high;
319 data-size = <16>;
320 select-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
326 gpio5: io-expander@20 {
329 gpio-controller;
330 #gpio-cells = <2>;
334 gpio6: io-expander@22 {
336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_pca9554_22>;
339 gpio-controller;
340 #gpio-cells = <2>;
341 interrupt-controller;
342 interrupt-parent = <&gpio3>;
350 pinctrl-0 = <&pinctrl_i2c_mux_reset>;
351 pinctrl-names = "default";
352 #address-cells = <1>;
353 #size-cells = <0>;
355 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
358 #address-cells = <1>;
359 #size-cells = <0>;
369 #address-cells = <1>;
370 #size-cells = <0>;
380 #address-cells = <1>;
381 #size-cells = <0>;
391 #address-cells = <1>;
392 #size-cells = <0>;
402 #address-cells = <1>;
403 #size-cells = <0>;
410 clock-frequency = <5000000>;
414 pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {
420 pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
430 pinctrl_mdio_mux: pinctrl-mdio-mux {
439 pinctrl_pca9554_22: pinctrl-pca95540-22 {