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/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sti.c - STMicroelectronics DWMAC Specific Glue layer
5 * Copyright (C) 2003-201
132 struct sti_dwmac *dwmac = priv; stih4xx_fix_retime_src() local
162 sti_dwmac_set_mode(struct sti_dwmac * dwmac) sti_dwmac_set_mode() argument
182 sti_dwmac_parse_data(struct sti_dwmac * dwmac,struct platform_device * pdev,struct plat_stmmacenet_data * plat_dat) sti_dwmac_parse_data() argument
238 struct sti_dwmac *dwmac = bsp_priv; sti_dwmac_init() local
254 struct sti_dwmac *dwmac = bsp_priv; sti_dwmac_exit() local
264 struct sti_dwmac *dwmac; sti_dwmac_probe() local
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H A Ddwmac-thead.c1 // SPDX-License-Identifier: GPL-2.0
3 * T-HEAD DWMAC platform driver
24 #define GMAC_RX_CLK_N_EN BIT(5)
56 struct thead_dwmac *dwmac = plat->bsp_priv; in thead_dwmac_set_phy_if() local
59 switch (plat->mac_interface) { in thead_dwmac_set_phy_if()
70 dev_err(dwmac->dev, "unsupported phy interface %d\n", in thead_dwmac_set_phy_if()
71 plat->mac_interface); in thead_dwmac_set_phy_if()
72 return -EINVAL; in thead_dwmac_set_phy_if()
75 writel(phyif, dwmac->apb_base + GMAC_INTF_CTRL); in thead_dwmac_set_phy_if()
81 struct thead_dwmac *dwmac = plat->bsp_priv; in thead_dwmac_set_txclk_dir() local
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H A Ddwmac-sun8i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer
11 #include <linux/mdio-mu
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H A Ddwmac-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
24 #define RMII_CLK_SRC_INTERNAL BIT(5)
28 #define ETH_DLY_GTXC_ENABLE BIT(5)
50 #define MT8195_DLY_GTXC_ENABLE BIT(5)
58 #define MT8195_DLY_TXC_ENABLE BIT(5)
66 #define MT8195_DLY_RMII_TXC_ENABLE BIT(5)
114 int rmii_clk_from_mac = plat->rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0; in mt2712_set_interface()
115 int rmii_rxc = plat->rmii_rx in mt2712_set_interface()
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/linux/Documentation/devicetree/bindings/net/
H A Dnxp,s32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright 2021-2024 NXP
4 ---
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H A Dnxp,lpc1850-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,lpc1850-dwma
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H A Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwma
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H A Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwma
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H A Drockchip-dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/rockchip-dwmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Davi
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H A Dtesla,fsd-ethqos.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/tesla,fsd-ethqo
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &enet1_lpcg;
7 /delete-node/ &fec2;
10 conn_enet0_root_clk: clock-conn-enet0-root {
11 compatible = "fixed-clock";
12 #clock-cell
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H A Dimx93-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
12 model = "Variscite VAR-SOM-MX93 module";
13 compatible = "variscite,var-som-mx93", "fsl,imx93";
15 mmc_pwrseq: mmc-pwrseq {
16 compatible = "mmc-pwrse
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/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controlle
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/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-binding
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/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-s4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-binding
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H A Damlogic-c3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-binding
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/linux/arch/arm/boot/dts/st/
H A Dstih418-b2199.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "st,stih418-b2199", "st,stih418";
14 stdout-path = &sbc_serial0;
28 compatible = "gpio-leds";
29 led-re
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H A Dstm32h747i-disco.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "stm32h7-pinctrl.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "STMicroelectronics STM32H747i-Discovery board";
14 compatible = "st,stm32h747i-disco", "st,stm32h747";
18 stdout-pat
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H A Dstm32mp135f-dhcor-dhsbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 * DHCR-STM32MP135F-C100-R051-EE-F040
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/linux/arch/arc/boot/dts/
H A Dabilis_tb10x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "abilis,arc-tb10x";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 compatible = "snps,arc-time
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H A Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cell
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H A Dvdk_axs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&mb_intc>;
18 compatible = "fixed-cloc
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/linux/arch/mips/boot/dts/loongson/
H A Dloongson64-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cell
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/linux/arch/mips/boot/dts/ni/
H A D169445.dts1 /dts-v1/;
4 #address-cells = <1>;
5 #size-cells = <1>;
9 #address-cells = <1>;
10 #size-cells = <0>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <50000000>;
30 cpu_intc: interrupt-controller {
31 #address-cell
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/linux/arch/riscv/boot/dts/sophgo/
H A Dcv180x.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/clock/sophgo,cv1800.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "cv18xx-reset.h"
13 #address-cells = <1>;
14 #size-cell
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