riscv: dts: sophgo: fix mdio node name for CV180X

As the mdio multipledxer is marked as mdio device, the check complains
the mdio bus number exceed the maximum.

Change the node name to mdio-mux to

riscv: dts: sophgo: fix mdio node name for CV180X

As the mdio multipledxer is marked as mdio device, the check complains
the mdio bus number exceed the maximum.

Change the node name to mdio-mux to remove the following warnings:
mdio@3009800 (mdio-mux-mmioreg): mdio@80:reg:0:0: 128 is greater than
the maximum of 31

Fixes: b7945143bc33 ("riscv: dts: sophgo: Add mdio multiplexer device for cv18xx")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202507140738.XRjv3G8i-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202507121830.POx2KDVi-lkp@intel.com/
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250715221349.11034-1-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: Add mdio multiplexer device for cv18xx

Add DT device node of mdio multiplexer device for cv18xx SoC.

Link: https://lore.kernel.org/r/20250703021600.125550-3-inochiama@gmail.com

riscv: dts: sophgo: Add mdio multiplexer device for cv18xx

Add DT device node of mdio multiplexer device for cv18xx SoC.

Link: https://lore.kernel.org/r/20250703021600.125550-3-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: Add ethernet device for cv18xx

Add ethernet controller device node for cv18xx SoC.

Link: https://lore.kernel.org/r/20250703021600.125550-2-inochiama@gmail.com
Signed-off-by: Ino

riscv: dts: sophgo: Add ethernet device for cv18xx

Add ethernet controller device node for cv18xx SoC.

Link: https://lore.kernel.org/r/20250703021600.125550-2-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC

Add known reset configuration for existed device.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https

riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC

Add known reset configuration for existed device.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250617070144.1149926-5-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC

Add reset generator node for all CV18XX series SoC.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Tested-by: Ju

riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC

Add reset generator node for all CV18XX series SoC.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Tested-by: Junhui Liu <junhui.liu@pigmoral.tech>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250617070144.1149926-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: cv18xx: Add RTCSYS device node

Add the RTCSYS MFD node: in Cvitek CV18xx and its successors RTC Subsystem
is quite advanced and provides SoC power management functions as well.

riscv: dts: sophgo: cv18xx: Add RTCSYS device node

Add the RTCSYS MFD node: in Cvitek CV18xx and its successors RTC Subsystem
is quite advanced and provides SoC power management functions as well.

The SoC family also contains DW8051 block (Intel 8051 compatible CPU core)
and an associated SRAM. The corresponding control registers are mapped into
RTCSYS address space as well.

Link: https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/r/20250513203128.620731-1-alexander.sverdlin@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sopgho: use SOC_PERIPHERAL_IRQ to calculate interrupt number

Since riscv and arm architecture use different interrupt definitions,
use a macro SOC_PERIPHERAL_IRQ mask this difference.

S

riscv: dts: sopgho: use SOC_PERIPHERAL_IRQ to calculate interrupt number

Since riscv and arm architecture use different interrupt definitions,
use a macro SOC_PERIPHERAL_IRQ mask this difference.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250430012654.235830-5-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: rename header file cv18xx.dtsi to cv180x.dtsi

As the cv18xx.dtsi serves as a common peripheral header for all
riscv cv180x/cv181x/sg200x SoCs, it not cover the entire cv18xx
seri

riscv: dts: sophgo: rename header file cv18xx.dtsi to cv180x.dtsi

As the cv18xx.dtsi serves as a common peripheral header for all
riscv cv180x/cv181x/sg200x SoCs, it not cover the entire cv18xx
series as there is cv182x and cv183x. So rename the header file
to make it precise.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250430012654.235830-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: Move riscv cpu definition to a separate file

As sg2000 and sg2002 can boot from an arm a53 core, it is not
suitable to left the riscv cpu definition in the common peripheral
head

riscv: dts: sophgo: Move riscv cpu definition to a separate file

As sg2000 and sg2002 can boot from an arm a53 core, it is not
suitable to left the riscv cpu definition in the common peripheral
header.

Move the riscv related device into a separate header file, so the
arm subsystem can reuse the common peripheral header.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250430012654.235830-3-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

riscv: dts: sophgo: Move all soc specific device into soc dtsi file

Although the cv1800b/cv1812h/sg2000/sg2002 share most peripherals,
some basic peripherals, like clock, pinctrl, clint and plint, a

riscv: dts: sophgo: Move all soc specific device into soc dtsi file

Although the cv1800b/cv1812h/sg2000/sg2002 share most peripherals,
some basic peripherals, like clock, pinctrl, clint and plint, are
not shared. These are caused by not only historical reason (plic,
clint), but also the fact the device is not the same (clock, pinctrl).

It is good to override device compatible when the SoC number is small,
but now it is a burden for maintenance, and it is kind of annoyed to
explain why using override. So it is time to move this out of the
common peripheral header.

Move all soc related peripheral device from common peripheral header
to the soc specific header to get rid of most compatible override.

Reviewed-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250430012654.235830-2-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

Linux 6.15-rc7