| /linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | ti-dma-crossbar.txt | 1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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| D | dma-router.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-router.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DMA Router Generic Binding
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: "dma-common.yaml#"
16 DMA routers are transparent IP blocks used to route DMA request
17 lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
18 have more peripherals integrated with DMA requests than what the DMA
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| /linux-5.10/lib/ |
| D | genalloc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
26 * Copyright 2005 (C) Jes Sorensen <jes@trained-monkey.org>
40 return chunk->end_addr - chunk->start_addr + 1; in chunk_size()
51 return -EBUSY; in set_bits_ll()
66 return -EBUSY; in clear_bits_ll()
74 * bitmap_set_ll - set the specified number of bits at the specified position
75 * @map: pointer to a bitmap
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| /linux-5.10/arch/arm/common/ |
| D | dmabounce.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Special dma_{map/unmap/dma_sync}_* routines for systems that have
6 * limited DMA windows. These functions utilize bounce buffers to
7 * copy data to/from buffers located outside the DMA region. This
8 * only works for systems in which DMA memory is at the bottom of
9 * RAM, the remainder of memory is at the top and the DMA memory
11 * DMA windows will require custom implementations that reserve memory
15 * Re-written by Christopher Hoover <ch@murgatroid.com>
25 #include <linux/page-flags.h>
27 #include <linux/dma-direct.h>
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| /linux-5.10/include/linux/ |
| D | genalloc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * kmalloc/kfree interface. Uses for this includes on-device special
8 * It is safe to use the allocator in NMI handlers and other special
21 * On architectures that don't have NMI-safe cmpxchg implementation,
41 * @map: Pointer to bitmap
48 typedef unsigned long (*genpool_algo_t)(unsigned long *map,
108 * gen_pool_add - add a new chunk of special memory to the pool
113 * allocated on, or -1
117 * Returns 0 on success or a -ve errno on failure.
122 return gen_pool_add_virt(pool, addr, -1, size, nid); in gen_pool_add()
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| D | dma-mapping.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/dma-direction.h>
15 * List of possible attributes associated with a DMA mapping. The semantics
16 * of each attribute should be defined in Documentation/core-api/dma-attributes.rst.
46 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem
52 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress
60 * at least read-only at lesser-privileged levels).
65 * A dma_addr_t can hold any valid DMA or bus address for the platform. It can
66 * be given to a device to use as a DMA source or target. It is specific to a
76 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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| D | dmaengine.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
20 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
49 * automatically set as dma devices are registered.
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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| /linux-5.10/Documentation/driver-api/usb/ |
| D | dma.rst | 1 USB DMA
5 over how DMA may be used to perform I/O operations. The APIs are detailed
11 The big picture is that USB drivers can continue to ignore most DMA issues,
12 though they still must provide DMA-ready buffers (see
13 :doc:`/core-api/dma-api-howto`). That's how they've worked through
14 the 2.4 (and earlier) kernels, or they can now be DMA-aware.
16 DMA-aware usb drivers:
18 - New calls enable DMA-aware drivers, letting them allocate dma buffers and
19 manage dma mappings for existing dma-ready buffers (see below).
21 - URBs have an additional "transfer_dma" field, as well as a transfer_flags
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| /linux-5.10/drivers/gpu/drm/i915/ |
| D | i915_mm.c | 26 #include <linux/io-mapping.h>
45 set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot))); in remap_pfn()
46 r->pfn++; in remap_pfn()
51 #define use_dma(io) ((io) != -1)
55 if (use_dma(r->iobase)) in sgt_pfn()
56 return (r->sgt.dma + r->sgt.curr + r->iobase) >> PAGE_SHIFT; in sgt_pfn()
58 return r->sgt.pfn + (r->sgt.curr >> PAGE_SHIFT); in sgt_pfn()
65 if (GEM_WARN_ON(!r->sgt.pfn)) in remap_sg()
66 return -EINVAL; in remap_sg()
69 set_pte_at(r->mm, addr, pte, in remap_sg()
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| /linux-5.10/drivers/staging/gasket/ |
| D | gasket_page_table.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * As much as possible, internal details are hidden to simplify use -
6 * all calls are thread-safe (protected by an internal mutex) except where
42 * Description: Allocates and initializes data to track address translation -
44 * partitioned such that all addresses are "simple" (single-level lookup).
62 * thread-safe (mutex-protected)!
76 * Returns 0 if successful, or non-zero if the page table entries
83 * Get and map [host] user space pages into device memory.
87 * @num_pages: Number of [4kB] pages to map.
94 * Returns 0 if successful or a non-zero error number otherwise.
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| /linux-5.10/include/net/ |
| D | page_pool.h | 1 /* SPDX-License-Identifier: GPL-2.0
12 * uses one-frame-per-page, but have fallbacks that act like the
19 * API keeps track of in-flight pages, in-order to let API user know
20 * when it is safe to dealloactor page_pool object. Thus, API users
27 * will release the DMA mapping and in-flight state accounting. We
35 #include <linux/dma-direction.h>
37 #define PP_FLAG_DMA_MAP BIT(0) /* Should page_pool do the DMA
38 * map/unmap
42 * DMA-synced-for-device according to
45 * Please note DMA-sync-for-CPU is still
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| /linux-5.10/Documentation/networking/ |
| D | page_pool.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 per-page, but it can fallback on the regular page allocator APIs.
15 when it is safe to free a page_pool object. Thus, API users
22 release the DMA mapping and inflight state accounting.
27 .. code-block:: none
29 +------------------+
31 +------------------+
37 +--------------------------------------------+
39 +--------------------------------------------+
45 +-----------------------+ +------------------------+
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| /linux-5.10/drivers/dma/ti/ |
| D | dma-crossbar.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
24 .compatible = "ti,dra7-dma-crossbar",
28 .compatible = "ti,am335x-edma-crossbar",
43 u32 dma_requests; /* number of DMA requests on eDMA */
59 writeb_relaxed(val, iomem + (63 - event % 4)); in ti_am335x_xbar_write()
67 struct ti_am335x_xbar_map *map = route_data; in ti_am335x_xbar_free() local
70 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
72 ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0); in ti_am335x_xbar_free()
73 kfree(map); in ti_am335x_xbar_free()
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| /linux-5.10/Documentation/driver-api/pci/ |
| D | p2pdma.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Peer-to-Peer DMA Support
7 The PCI bus has pretty decent support for performing DMA transfers
9 called Peer-to-Peer (or P2P). However, there are a number of issues that
10 make P2P transactions tricky to do in a perfectly safe way.
36 * Provider - A driver which provides or publishes P2P resources like
38 * Client - A driver which makes use of a resource by setting up a
39 DMA transaction to or from it.
40 * Orchestrator - A driver which orchestrates the flow of data between
54 can DMA directly to the memory exposed by the NVMe device.
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| /linux-5.10/Documentation/core-api/ |
| D | dma-api-howto.rst | 2 Dynamic DMA mapping Guide
9 This is a guide to device driver writers on how to use the DMA API
10 with example pseudo-code. For a concise description of the API, see
11 DMA-API.txt.
13 CPU and DMA addresses
16 There are several kinds of addresses involved in the DMA API, and it's
27 address is not directly useful to a driver; it must use ioremap() to map
31 registers at an MMIO address, or if it performs DMA to read or write system
37 From a device's point of view, DMA uses the bus address space, but it may
39 supports 64-bit addresses for main memory and PCI BARs, it may use an IOMMU
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| /linux-5.10/net/core/ |
| D | page_pool.c | 1 /* SPDX-License-Identifier: GPL-2.0
14 #include <linux/dma-direction.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/page-flags.h>
29 memcpy(&pool->p, params, sizeof(pool->p)); in page_pool_init()
32 if (pool->p.flags & ~(PP_FLAG_ALL)) in page_pool_init()
33 return -EINVAL; in page_pool_init()
35 if (pool->p.pool_size) in page_pool_init()
36 ring_qsize = pool->p.pool_size; in page_pool_init()
40 return -E2BIG; in page_pool_init()
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| /linux-5.10/drivers/mtd/spi-nor/ |
| D | sfdp.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/mtd/spi-nor.h>
13 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
15 (((p)->parameter_table_pointer[2] << 16) | \
16 ((p)->parameter_table_pointer[1] << 8) | \
17 ((p)->parameter_table_pointer[0] << 0))
20 #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
21 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
29 u8 nph; /* 0-base number of parameter headers */
38 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
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| /linux-5.10/Documentation/driver-api/ |
| D | vfio.rst | 2 VFIO - "Virtual Function I/O" [1]_
5 Many modern system now provide DMA and interrupt remapping facilities
7 allotted. This includes x86 hardware with AMD-Vi and Intel VT-d,
12 safe [2]_, non-privileged, userspace drivers.
19 bare-metal device drivers [3]_.
22 field, also benefit from low-overhead, direct device access from
23 userspace. Examples include network adapters (often non-TCP/IP based)
36 ---------------------------
40 and DMA. Without going into the details of each of these, DMA is
42 as allowing a device read-write access to system memory imposes the
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| /linux-5.10/drivers/parisc/ |
| D | ccio-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** ccio-dma.c:
4 ** DMA management routines for first generation cache-coherent machines.
9 ** (c) Copyright 2000 Hewlett-Packard Company
15 ** the I/O MMU - basically what x86 does.
17 ** Philipp Rumpf has a "Real Mode" driver for PCX-W machines at:
18 ** CVSROOT=:pserver:anonymous@198.186.203.37:/cvsroot/linux-parisc
19 ** cvs -z3 co linux/arch/parisc/kernel/dma-rm.c
21 ** I've rewritten his code to work under TPG's tree. See ccio-rm-dma.c.
24 ** o outbound DMA is slower - U2 won't prefetch data (GSC+ XQL signal).
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| /linux-5.10/sound/soc/fsl/ |
| D | fsl_ssi.c | 1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
52 #include "imx-pcm.h"
54 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
65 * (bit-endianness must match byte-endianness). Processors typically write
67 * written in. So if the host CPU is big-endian, then only big-endian
90 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
91 * - Also have NB_NF to mark these two clocks will not be inverted
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| /linux-5.10/Documentation/admin-guide/ |
| D | pstore-blk.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
10 block device and non-block device before the system crashes. You can get
13 mount -t pstore pstore /sys/fs/pstore
17 ---------------------
27 Configurations for driver are all about block device and non-block device,
31 -----------------------
53 #. /dev/<disk_name><decimal> represents the device number of partition - device
55 #. /dev/<disk_name>p<decimal> - same as the above; this form is used when disk
57 #. PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF represents the unique id of
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| /linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include <dt-bindings/power/tegra194-powergate.h>
8 #include <dt-bindings/reset/tegra194-reset.h>
9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
10 #include <dt-bindings/memory/tegra194-mc.h>
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| /linux-5.10/drivers/gpu/drm/mga/ |
| D | mga_dma.c | 1 /* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
30 * DMA support for MGA G200 / G400.
59 for (i = 0; i < dev_priv->usec_timeout; i++) { in mga_do_wait_for_idle()
72 return -EBUSY; in mga_do_wait_for_idle()
77 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; in mga_do_dma_reset()
78 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_reset()
82 /* The primary DMA stream should look like new right about now. in mga_do_dma_reset()
84 primary->tail = 0; in mga_do_dma_reset()
85 primary->space = primary->size; in mga_do_dma_reset()
86 primary->last_flush = 0; in mga_do_dma_reset()
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| /linux-5.10/arch/x86/include/asm/ |
| D | io.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 * versions of the single-IO instructions (inb_p/inw_p/..).
19 * Thanks to James van Artsdalen for a better timing-fix than
23 * On the other hand, I'd like to be sure of a non-existent port:
24 * I feel a bit unsafe about using 0x80 (should be safe, though)
35 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
117 * virt_to_phys - map virtual addresses to physical
124 * This function does not give bus mappings for DMA transfers. In
136 * phys_to_virt - map physical address to virtual
143 * This function does not handle bus mappings for DMA transfers. In
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| /linux-5.10/drivers/media/pci/ivtv/ |
| D | ivtv-yuv.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include "ivtv-driver.h"
10 #include "ivtv-udma.h"
11 #include "ivtv-yuv.h"
25 static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, in ivtv_yuv_prep_user_dma() argument
30 struct yuv_playback_info *yi = &itv->yuv_info; in ivtv_yuv_prep_user_dma()
31 u8 frame = yi->draw_frame; in ivtv_yuv_prep_user_dma()
32 struct yuv_frame_info *f = &yi->new_frame_info[frame]; in ivtv_yuv_prep_user_dma()
40 y_decode_height = uv_decode_height = f->src_h + f->src_y; in ivtv_yuv_prep_user_dma()
42 if (f->offset_y) in ivtv_yuv_prep_user_dma()
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