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/qemu/docs/devel/
H A Dmulti-process.rst1 Multi-process QEMU
6 This is the design document for multi-process QEMU. It does not
31 -------------
34 VM control point, where VMs can be created, migrated, re-configured, and
40 A multi-process QEMU
43 A multi-process QEMU involves separating QEMU services into separate
51 A QEMU control process would remain, but in multi-process mode, will
53 provide the user interface to hot-plug devices or live migrate the VM.
55 A first step in creating a multi-process QEMU is to separate IO services
62 ----------------------
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H A Dreset.rst18 ----------------
43 have some non-deterministic state they want to reinitialize to a different
45 must not reinitialize on a snapshot-load reset.
49 its devices during wake-up (from the ``MachineClass::wakeup()`` method), this
51 type to differentiate the reset requested during machine wake-up from other
52 reset requests. For example, RAM content must not be lost during wake-up, and
53 memory devices like virtio-mem that provide additional RAM must not reset
54 such state during wake-ups, but might do so during cold resets. However, this
55 reset type should not be used for wake-up detection, as not every machine
56 type issues a device reset request during wake-up.
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/qemu/hw/net/
H A Digb_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
51 /* Receive Descriptor - Advanced */
94 /* Enable flexible speed on link-up */
107 #define IGP02E1000_AGC_LENGTH_SHIFT 9 /* Course - 15:13, Fine - 12:9 */
291 #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
308 #define E1000_ICR_DOUTSYNC 0x10000000 /* NIC DMA out of sync */
335 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
346 #define E1000_P2VMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */
353 #define E1000_V2PMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */
364 /* Indicates that VF is still clear to send requests */
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/qemu/hw/dma/
H A Dpl080.c2 * Arm PrimeCell PL080/PL081 DMA controller
15 #include "hw/dma/pl080.h"
18 #include "hw/qdev-properties.h"
83 bool tclevel = (s->tc_int & s->tc_mask); in pl080_update()
84 bool errlevel = (s->err_int & s->err_mask); in pl080_update()
86 qemu_set_irq(s->interr, errlevel); in pl080_update()
87 qemu_set_irq(s->inttc, tclevel); in pl080_update()
88 qemu_set_irq(s->irq, errlevel || tclevel); in pl080_update()
106 s->tc_mask = 0; in pl080_run()
107 for (c = 0; c < s->nchannels; c++) { in pl080_run()
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/qemu/hw/ide/
H A Dcore.c2 * QEMU IDE disk and CD/DVD-ROM Emulator
30 #include "qemu/error-report.h"
31 #include "qemu/main-loop.h"
33 #include "qemu/hw-version.h"
37 #include "system/dma.h"
39 #include "system/block-backend.h"
44 #include "ide-internal.h"
63 /* airflow-temperature-celsius */
68 [IDE_DMA_READ] = "DMA READ",
69 [IDE_DMA_WRITE] = "DMA WRITE",
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H A Dahci.c28 #include "qemu/error-report.h"
30 #include "qemu/main-loop.h"
31 #include "system/block-backend.h"
32 #include "system/dma.h"
33 #include "ahci-internal.h"
34 #include "ide-internal.h"
44 static int ahci_dma_prepare_buf(const IDEDMA *dma, int32_t limit);
113 AHCIPortRegs *pr = &s->dev[port].port_regs; in ahci_port_read()
119 val = pr->lst_addr; in ahci_port_read()
122 val = pr->lst_addr_hi; in ahci_port_read()
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H A Datapi.c29 #include "system/block-backend.h"
31 #include "ide-internal.h"
60 return !s->tray_open && s->nb_sectors > 0; in media_present()
66 return (media_present(s) && s->nb_sectors > CD_MAX_SECTORS); in media_is_dvd()
71 return (media_present(s) && s->nb_sectors <= CD_MAX_SECTORS); in media_is_cd()
95 block_acct_start(blk_get_stats(s->blk), &s->acct, in cd_read_sector_sync()
98 trace_cd_read_sector_sync(s->lba); in cd_read_sector_sync()
100 switch (s->cd_sector_size) { in cd_read_sector_sync()
102 ret = blk_pread(s->blk, (int64_t)s->lba << ATAPI_SECTOR_BITS, in cd_read_sector_sync()
103 ATAPI_SECTOR_SIZE, s->io_buffer, 0); in cd_read_sector_sync()
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H A Dtrace-events16 ide_cancel_dma_sync_buffered(void *fn, void *req) "invoking cb %p of buffered request %p with -ECAN…
17 ide_cancel_dma_sync_remaining(void) "draining all remaining requests"
22 ide_dma_cb(void *s, int64_t sector_num, int n, const char *dma) "IDEState %p; sector_num=%"PRId64" …
70 ahci_check_irq(void *s, uint32_t old, uint32_t new) "ahci(%p): check irq 0x%08x --> 0x%08x"
71 …nt32_t effective) "ahci(%p)[%d]: trigger irq +%s (0x%08x); irqstat: 0x%08x --> 0x%08x; effective: …
89 ahci_populate_sglist_no_map(void *s, int port) "ahci(%p)[%d]: DMA mapping failed"
103 …rt, char b0, char b1, char b2) "ahci(%p)[%d]: Port Multiplier not supported, FIS: 0x%02x-%02x-%02x"
104 …b0, char b1, char b2) "ahci(%p)[%d]: Reserved flags set in H2D Register FIS, FIS: 0x%02x-%02x-%02x"
106 handle_cmd_nolist(void *s, int port) "ahci(%p)[%d]: handle_cmd called without s->dev[port].lst"
110 …, uint8_t b0, uint8_t b1, uint8_t b2) "ahci(%p)[%d]: unhandled FIS type. cmd_fis: 0x%02x-%02x-%02x"
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/qemu/hw/scsi/
H A Dviosrp.h2 /* srp.h -- SCSI RDMA Protocol definitions */
74 uint8_t format; /* SCSI vs out-of-band */
76 uint8_t status; /* non-scsi failure? (e.g. DMA failure) */
82 /* MADs are Management requests above and beyond the IUs defined in the SRP
133 * All SRP (and MAD) requests normally flow from the
213 uint32_t port_max_txu[8]; /* per-port maximum transfer */
H A Dscsi-bus.c3 #include "qemu/error-report.h"
6 #include "qemu/hw-version.h"
7 #include "hw/qdev-properties.h"
9 #include "migration/qemu-file-types.h"
12 #include "system/block-backend.h"
17 #include "system/dma.h"
36 QTAILQ_FOREACH_RCU(kid, &bus->qbus.children, sibling) { in do_scsi_device_find()
37 DeviceState *qdev = kid->child; in do_scsi_device_find()
40 if (dev->channel == channel && dev->id == id) { in do_scsi_device_find()
41 if (dev->lun == lun) { in do_scsi_device_find()
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H A Dvirtio-scsi.c12 * See the COPYING file in the top-level directory.
18 #include "standard-headers/linux/virtio_ids.h"
19 #include "hw/virtio/virtio-scsi.h"
20 #include "migration/qemu-file-types.h"
21 #include "qemu/defer-call.h"
22 #include "qemu/error-report.h"
25 #include "system/block-backend.h"
26 #include "system/dma.h"
27 #include "hw/qdev-properties.h"
30 #include "hw/virtio/iothread-vq-mapping.h"
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/qemu/hw/tpm/
H A Dtpm_spapr.c12 * COPYING file in the top-level directory.
17 #include "qemu/error-report.h"
19 #include "hw/qdev-properties.h"
39 /* 0x81-0x83: CRQ message response */
96 tpm_util_show_buffer(s->buffer, s->be_buffer_size, "To TPM"); in tpm_spapr_tpm_send()
98 s->state = SPAPR_VTPM_STATE_EXECUTION; in tpm_spapr_tpm_send()
99 s->cmd = (TPMBackendCmd) { in tpm_spapr_tpm_send()
101 .in = s->buffer, in tpm_spapr_tpm_send()
102 .in_len = MIN(tpm_cmd_get_size(s->buffer), s->be_buffer_size), in tpm_spapr_tpm_send()
103 .out = s->buffer, in tpm_spapr_tpm_send()
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/qemu/hw/s390x/
H A Ds390-pci-vfio.c2 * s390 vfio-pci interfaces
8 * your option) any later version. See the COPYING file in the top-level
19 #include "hw/s390x/s390-pci-bus.h"
20 #include "hw/s390x/s390-pci-clp.h"
21 #include "hw/s390x/s390-pci-vfio.h"
23 #include "hw/vfio/vfio-container.h"
24 #include "hw/vfio/vfio-helpers.h"
27 * Get the current DMA available count from vfio. Returns true if vfio is
28 * limiting DMA requests, false otherwise. The current available count read
44 info->argsz = argsz; in s390_pci_update_dma_avail()
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/qemu/hw/uefi/
H A Dvar-service-guid.c2 * SPDX-License-Identifier: GPL-2.0-or-later
4 * uefi vars device - GUIDs
8 #include "system/dma.h"
10 #include "hw/uefi/var-service.h"
68 * sending requests to management mode
/qemu/docs/specs/
H A Dvmw_pvscsi-spec.rst21 hypervisor to VM. Data itself is transferred via virtual scatter-gather DMA.
38 ring for OS to device requests
57 - ``PVSCSI_INTR_CMPL_0``
58 - ``PVSCSI_INTR_CMPL_1``
62 - ``PVSCSI_INTR_MSG_0``
63 - ``PVSCSI_INTR_MSG_1``
69 The interrupt modes supported are legacy, MSI and MSI-X.
79 ----------------
93 -----------------
100 ------------
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/qemu/system/
H A Dtrace-events4 # Since requests are raised via monitor, not many tracepoints are needed.
7 # dma-helpers.c
56 # ram-block-attributes.c
H A Ddma-helpers.c2 * DMA helper functions
11 #include "system/block-backend.h"
12 #include "system/dma.h"
15 #include "qemu/main-loop.h"
32 qsg->sg = g_new(ScatterGatherEntry, alloc_hint); in qemu_sglist_init()
33 qsg->nsg = 0; in qemu_sglist_init()
34 qsg->nalloc = alloc_hint; in qemu_sglist_init()
35 qsg->size = 0; in qemu_sglist_init()
36 qsg->as = as; in qemu_sglist_init()
37 qsg->dev = dev; in qemu_sglist_init()
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/qemu/hw/sh4/
H A Dsh7750_regs.h2 * SH-7750 memory-mapped registers
6 * Document Number ADE-602-124C, Rev. 4.0, 4/21/00, Hitachi Ltd.
8 * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
42 * All register has 2 addresses: in 0xff000000 - 0xffffffff (P4 address) and
43 * in 0x1f000000 - 0x1fffffff (area 7 address)
55 /* Page Table Entry High register - PTEH */
64 /* Page Table Entry Low register - PTEL */
70 #define SH7750_PTEL_V 0x00000100 /* Validity (0-entry is invalid) */
73 #define SH7750_PTEL_SZ_1KB 0x00000000 /* 1-kbyte page */
74 #define SH7750_PTEL_SZ_4KB 0x00000010 /* 4-kbyte page */
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/qemu/docs/
H A Drdma.txt31 data copies by bypassing the host networking stack. In particular, a TCP-based
32 migration, under certain types of memory-bound workloads, may take a more
38 over Converged Ethernet) as well as Infiniband-based. This implementation of
56 of RDMA migration may in fact be harmful to co-located VMs or other
65 bulk-phase round of the migration and can be enabled for extremely
66 high-performance RDMA hardware using the following command:
69 $ migrate_set_capability rdma-pin-all on # disabled by default
92 $ migrate_set_parameter max-bandwidth 40g # or whatever is the MAX of your RDMA device
96 qemu ..... -incoming rdma:host:port
101 $ migrate -d rdma:host:port
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/qemu/docs/interop/
H A Dvhost-user.rst4 Vhost-user Protocol
11 version 2 or later. See the COPYING file in the top-level
26 The protocol defines 2 sides of the communication, *front-end* and
27 *back-end*. The *front-end* is the application that shares its virtqueues, in
28 our case QEMU. The *back-end* is the consumer of the virtqueues.
30 In the current implementation QEMU is the *front-end*, and the *back-end*
33 or a block device back-end processing read & write to a virtual
34 disk. In order to facilitate interoperability between various back-end
38 The *front-end* and *back-end* can be either a client (i.e. connecting) or
42 --------------------------------------
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/qemu/include/block/
H A Dblock_int-common.h28 #include "block/block-common.h"
29 #include "block/block-global-state.h"
105 * certain callbacks that refer to data (see block.c) to their bs->file
106 * or bs->backing (whichever one exists) if the driver doesn't implement
108 * -ENOTSUP.
115 * (And this filtered child must then be bs->file or bs->backing.)
120 * If true, filtered child is bs->backing. Otherwise it's bs->file.
121 * Two internal filters use bs->backing as filtered child and has this
123 * filters in tests/unit/test-bdrv-graph-mod.c.
128 * similarly using bs->file as filtered child.
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/qemu/linux-headers/linux/
H A Diommufd.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
23 * - ENOTTY: The IOCTL number itself is not supported at all
24 * - E2BIG: The IOCTL number is supported, but the provided structure has
25 * non-zero in a part the kernel does not understand.
26 * - EOPNOTSUPP: The IOCTL number is supported, and the structure is
29 * - EINVAL: Everything about the IOCTL was understood, but a field is not
31 * - ENOENT: An ID or IOVA provided does not exist.
32 * - ENOMEM: Out of memory.
33 * - EOVERFLOW: Mathematics overflowed.
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H A Dvfio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
29 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This
37 /* Two-stage IOMMU */
43 * The No-IOMMU IOMMU offers no translation or isolation for devices and
44 * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU
53 * Supports the vaddr flag for DMA map and unmap. Not supported for mediated
100 /* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
103 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
114 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
123 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
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/qemu/hw/block/
H A Dfdc.c27 * way. There are changes in DOR register and DMA is not available.
33 #include "qemu/error-report.h"
38 #include "hw/qdev-properties.h"
39 #include "hw/qdev-properties-system.h"
42 #include "system/block-backend.h"
46 #include "qemu/main-loop.h"
50 #include "fdc-internal.h"
74 #define TYPE_FLOPPY_BUS "floppy-bus"
88 bus->fdc = fdc; in floppy_bus_create()
143 { FLOPPY_DRIVE_TYPE_NONE, -1, -1, 0, 0, },
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/qemu/hw/i386/
H A Dintel_iommu.c2 * QEMU emulation of an Intel IOMMU (VT-d)
3 * (DMA Remapping device)
23 #include "qemu/error-report.h"
24 #include "qemu/main-loop.h"
30 #include "hw/qdev-properties.h"
32 #include "hw/i386/apic-msidef.h"
33 #include "hw/i386/x86-iommu.h"
34 #include "hw/pci-host/q35.h"
36 #include "system/dma.h"
45 ((ce)->val[1] & VTD_SM_CONTEXT_ENTRY_RID2PASID_MASK)
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