Searched +full:disable +full:- +full:cqe +full:- +full:dcmd (Results 1 – 6 of 6) sorted by relevance
1 /* SPDX-License-Identifier: GPL-2.0-only */12 #include <linux/fault-inject.h>17 #include <linux/dma-direction.h>108 * ios->clock might be 0. For some controllers, setting 0Hz110 * explicitly need to disable the clock. Otherwise e.g. voltage118 * 1 for a read-only card119 * -ENOSYS when not supported (equal to NULL callback)128 * -ENOSYS when not supported (equal to NULL callback)179 /* Allocate resources, and make the CQE operational */181 /* Free resources, and make the CQE non-operational */[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Ulf Hansson <ulf.hansson@linaro.org>25 "#address-cells":30 "#size-cells":37 broken-cd:42 cd-gpios:46 non-removable:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only10 #include <linux/dma-mapping.h>37 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc()44 return desc + cq_host->task_desc_len; in get_link_desc()49 return cq_host->trans_desc_dma_base + in get_trans_desc_dma()50 (cq_host->mmc->max_segs * tag * in get_trans_desc_dma()51 cq_host->trans_desc_len); in get_trans_desc_dma()56 return cq_host->trans_desc_base + in get_trans_desc()57 (cq_host->trans_desc_len * cq_host->mmc->max_segs * tag); in get_trans_desc()68 memset(link_temp, 0, cq_host->link_desc_len); in setup_trans_desc()[all …]
1 // SPDX-License-Identifier: GPL-2.05 * derived from the OF-version.23 #include <linux/mmc/slot-gpio.h>27 #include <linux/platform_data/mmc-esdhc-imx.h>29 #include "sdhci-pltfm.h"30 #include "sdhci-esdhc.h"82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)133 * open ended multi-blk IO. Otherwise the TC INT wouldn't190 * disable the ACMD23 feature.301 .name = "sdhci-esdhc-imx25",[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>9 * Based on sdhci-of-esdhc.c18 #include <linux/clk-provider.h>25 #include <linux/firmware/xlnx-zynqmp.h>28 #include "sdhci-pltfm.h"55 * On some SoCs the syscon area has a feature where the upper 16-bits of56 * each 32-bit register act as a write mask for the lower 16-bits. This allows64 * struct sdhci_arasan_soc_ctl_field - Field used in sdhci_arasan_soc_ctl_map68 * @shift: Bit offset within @reg of this field (or -1 if not avail)[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/rk3399-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/rk3399-power.h>12 #include <dt-bindings/thermal/thermal.h>17 interrupt-parent = <&gic>;18 #address-cells = <2>;[all …]