| /qemu/docs/devel/ |
| H A D | kconfig.rst | 13 SCSI adapters. Arm, s390 and x86 boards can all present a virtio-blk
21 QEMU uses a simple domain-specific language to describe the dependencies
31 of boards or devices. For example, by default most targets will include
36 This domain-specific language is based on the Kconfig language that
41 is instead specified in per-target files under the ``configs/``
44 QEMU; the default configuration that QEMU ships with should be okay in
48 --------------------
78 include it for clarity and future-proofing. After ``bool`` the following
81 **dependencies**: ``depends on <expr>``
89 While ``depends on`` can force a symbol to false, reverse dependencies can
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| /qemu/docs/system/arm/ |
| H A D | virt.rst | 1 .. _arm-virt:
10 idiosyncrasies and limitations of a particular bit of real-world
18 ``virt-5.0`` machine type will behave like the ``virt`` machine from
19 the QEMU 5.0 release, and migration should work between ``virt-5.0``
20 of the 5.0 release and ``virt-5.0`` of the 5.1 release. Migration
22 the non-versioned ``virt`` machine type.
24 VM migration is not guaranteed when using ``-cpu max``, as features
33 - PCI/PCIe devices
34 - Flash memory
35 - Either one or two PL011 UARTs for the NonSecure World
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| H A D | cpu-features.rst | 10 Cortex-A15 and the Cortex-A57, which respectively implement Arm
11 architecture reference manuals ARMv7-A and ARMv8-A, may both optionally
12 implement PMUs. For example, if a user wants to use a Cortex-A15 without
13 a PMU, then the ``-cpu`` parameter should contain ``pmu=off`` on the QEMU
14 command line, i.e. ``-cpu cortex-a15,pmu=off``.
17 not a CPU property exists depends on the CPU type. For example, CPUs
18 that implement the ARMv8-A architecture reference manual may optionally
20 ``aarch64`` CPU property. A CPU type such as the Cortex-A15, which does
21 not implement ARMv8-A, will not have the ``aarch64`` CPU property.
27 when using the KVM accelerator and when running on a host CPU type that
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| /qemu/docs/system/devices/ |
| H A D | nvme.rst | 5 QEMU provides NVMe emulation through the ``nvme``, ``nvme-ns`` and
6 ``nvme-subsys`` devices.
8 See the following sections for specific information on
12 `Simple Copy`_, `Zoned Namespaces`_, `metadata`_ and `End-to-End Data
19 --------------------
27 * Interrupt Coalescing is not supported and is disabled by default.
29 The simplest way to attach an NVMe controller on the QEMU PCI bus is to add the
32 .. code-block:: console
34 -drive file=nvm.img,if=none,id=nvm
35 -device nvme,serial=deadbeef,drive=nvm
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| /qemu/ |
| H A D | qemu-options.hx | 14 "-h or -help display this help and exit\n", QEMU_ARCH_ALL)
16 ``-h``
21 "-version display version information and exit\n", QEMU_ARCH_ALL)
23 ``-version``
28 "-machine [type=]name[,prop[=value][,...]]\n"
29 " selects emulated machine ('-machine help' for list)\n"
31 " supported accelerators are kvm, xen, hvf, nvmm, whpx or tcg (default: tcg)\n"
32 " vmport=on|off|auto controls emulation of vmport (default: auto)\n"
33 " dump-guest-core=on|off include guest memory in a core dump (default=on)\n"
34 " mem-merge=on|off controls memory merge support (default: on)\n"
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| /qemu/hw/ppc/ |
| H A D | Kconfig | 3 default y
4 depends on PPC64 && FDT
23 default y
24 depends on PSERIES
28 default y
29 depends on PPC64 && FDT
49 default y
50 depends on PPC && FDT
68 default y
69 depends on PPC && FDT
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| /qemu/hw/riscv/ |
| H A D | Kconfig | 10 # RISC-V machines in alphabetical order
14 default y
15 depends on RISCV64
30 default y
31 depends on RISCV32 || RISCV64
38 default y
39 depends on RISCV32
46 default y
47 depends on RISCV32 || RISCV64
74 default y
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| /qemu/docs/ |
| H A D | bypass-iommu.txt | 10 passthrough devices with no-iommu mode and devices go through vIOMMU in
14 determine whether the devices attached on the PCI host bridge will bypass
18 the attached devices will go through vIOMMU by default.
22 The bypass iommu feature support PXB host bridge and default main host
25 the 'q35' machine type on x86 architecture and the 'virt' machine type
26 on AArch64. Other machine types do not support bypass iommu for default
31 qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
32 (2) Arm default host bridge
33 qemu -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
34 (3) X86 default root bus bypass iommu:
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| H A D | qdev-device-use.txt | 1 = How to convert to -device & friends =
3 === Specifying Bus and Address on Bus ===
7 -device parameter bus.
9 A device typically has a device address on its parent bus. For buses
10 where this address can be configured, devices provide a bus-specific
16 SCSI scsi-id %u
19 virtio-serial-bus nr %u
20 ccid-bus slot %u
23 Example: device i440FX-pcihost is on the root bus, and provides a PCI
24 bus named pci.0. To put a FOO device into its slot 4, use -device
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| H A D | qcow2-cache.txt | 3 Copyright (C) 2015, 2018-2020 Igalia, S.L.
7 later. See the COPYING file in the top-level directory.
10 ------------
18 Please refer to the docs/interop/qcow2.rst file for an in-depth
23 --------
30 The 'qemu-img create' command supports specifying the size using the
33 qemu-img create -f qcow2 -o cluster_size=128K hd.qcow2 4G
37 -------------
38 The qcow2 format uses a two-level structure to map the virtual disk as
45 There can be many L2 tables, depending on how much space has been
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| /qemu/docs/system/ |
| H A D | cpu-models-x86.rst.inc | 1 Recommendations for KVM CPU model configuration on x86 hosts
5 CPU models on x86 hosts. The goals are to maximise performance, while
31 features, to alter what is presented to the guest by default.
51 lists the long term stable CPU model versions (eg Haswell-v4).
54 depending on the machine type is in use.
56 .. _ABI compatibility levels: https://gitlab.com/x86-psABIs/x86-64-ABI/
58 .. csv-table:: x86-64 ABI compatibility levels
59 :file: cpu-models-x86-abi.csv
61 :header-rows: 1
67 The following CPU models are preferred for use on Intel hosts.
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| H A D | target-riscv.rst | 1 .. _RISC-V-System-emulator:
3 RISC-V System emulator
6 QEMU can emulate both 32-bit and 64-bit RISC-V CPUs. Use the
7 ``qemu-system-riscv64`` executable to simulate a 64-bit RISC-V machine,
8 ``qemu-system-riscv32`` executable to simulate a 32-bit RISC-V machine.
10 QEMU has generally good support for RISC-V guests. It has support for
12 RISC-V hardware is much more widely varying than x86 hardware. RISC-V
13 CPUs are generally built into "system-on-chip" (SoC) designs created by
23 ----------------------
25 For QEMU's RISC-V system emulation, you must specify which board
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| /qemu/qapi/ |
| H A D | qom.json | 1 # -*- Mode: Python -*-
5 # See the COPYING file in the top-level directory.
8 { 'include': 'block-core.json' }
38 # @default-value: the default value, if any (since 5.0)
46 '*default-value': 'any' } }
49 # @qom-list:
54 # @path: the path within the object model. See @qom-get for a
62 # .. qmp-example::
64 # -> { "execute": "qom-list",
66 # <- { "return": [ { "name": "type", "type": "string" },
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| H A D | block-export.json | 1 # -*- Mode: Python -*-
9 { 'include': 'block-core.json' }
14 # @handshake-max-seconds: Time limit, in seconds, at which a client
16 # disconnected, or 0 for no limit (since 10.0; default: 10).
18 # @tls-creds: ID of the TLS credentials object (since 2.6).
20 # @tls-authz: ID of the QAuthZ authorization object used to validate
22 # resolved at time of use, so can be deleted and recreated on the
23 # fly while the NBD server is active. If missing, it will default
26 # @max-connections: The maximum number of connections to allow at the
29 # default: 100).
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| H A D | block-core.json | 1 # -*- Mode: Python -*-
20 # @vm-state-size: size of the VM state
22 # @date-sec: UTC date of the snapshot in seconds
24 # @date-nsec: fractional part in nano seconds to be used with date-sec
26 # @vm-clock-sec: VM clock relative to boot in seconds
28 # @vm-clock-nsec: fractional part in nano seconds to be used with
29 # vm-clock-sec
32 # record/replay is enabled. Used for "time-traveling" to match
34 # counter may be obtained through @query-replay command
40 'data': { 'id': 'str', 'name': 'str', 'vm-state-size': 'int',
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| H A D | audio.json | 1 # -*- mode: python -*-
4 # Copyright (C) 2015-2019 Zoltán Kővágó <DirtY.iCE.hu@gmail.com>
7 # See the COPYING file in the top-level directory.
19 # @mixing-engine: use QEMU's mixing engine to mix all streams inside
21 # backend. When set to off, fixed-settings must be also off
22 # (default on, since 4.2)
24 # @fixed-settings: use fixed settings for host input/output. When
26 # (default true)
28 # @frequency: frequency to use when using fixed settings (default
31 # @channels: number of channels when using fixed settings (default 2)
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| /qemu/docs/specs/ |
| H A D | ppc-spapr-xive.rst | 13 - *Legacy Compatibility Mode*
16 functionality to PAPR+ Version 2.7. This is the default mode
20 - *XIVE native exploitation mode*
34 ---------------
37 property ``ibm,arch-vec-5-platform-support`` in byte 23 and the OS
38 Selection for XIVE is indicated in the ``ibm,architecture-vec-5``
41 The interrupt modes supported by the machine depend on the CPU type
42 (POWER9 is required for XIVE) but also on the machine property
43 ``ic-mode`` which can be set on the command line. It can take the
45 default mode. ``dual`` means that both modes XICS **and** XIVE are
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| /qemu/docs/system/s390x/ |
| H A D | cpu-topology.rst | 1 .. _cpu-topology-s390x:
3 CPU topology on s390x
6 Since QEMU 8.2, CPU topology on s390x provides up to 3 levels of
8 tree-shaped hierarchy.
13 - CPU type
14 - entitlement
15 - dedication
17 Each bit set in the bitmap correspond to a core-id of a vCPU with matching
20 This documentation provides general information on S390 CPU topology,
22 For information on how to modify the S390 CPU topology and how to
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| H A D | bootdevices.rst | 1 Boot devices on s390x
5 --------------------------------
9 in s390x-speak -- IPL means "Initial Program Load").
15 qemu-system-s390x -drive if=none,id=dr1,file=guest.qcow2 \
16 -device virtio-blk,drive=dr1,bootindex=1
20 lowest bootindex will be tried and so on until IPL is successful or there are no
23 For booting from a CD-ROM ISO image (which needs to include El-Torito boot
24 information in order to be bootable), it is recommended to specify a ``scsi-cd``
27 qemu-system-s390x -blockdev file,node-name=c1,filename=... \
28 -device virtio-scsi \
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| H A D | vfio-ap.rst | 7 ------------
14 On s390x, AP adapter cards are exposed via the AP bus. This document
19 -------------------------
28 on the machine model. Adapters assigned to the LPAR in which a linux host is
51 An AP queue is the means by which an AP command-request message is sent to an
57 which the AP command-request message is to be sent for processing.
63 * NQAP: to enqueue an AP command-request message to a queue
64 * DQAP: to dequeue an AP command-reply message from a queue
73 ----------------------------------------------
84 an APID from 0-255. If a bit is set, the corresponding adapter is valid for
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| /qemu/include/hw/xen/interface/io/ |
| H A D | blkif.h | 1 /* SPDX-License-Identifier: MIT */
5 * Unified block-device I/O interface for Xen guest OSes.
7 * Copyright (c) 2003-2004, Keir Fraser
18 * Front->back notifications: When enqueuing a new request, sending a
19 * notification can be made conditional on req_event (i.e., the generic
20 * hold-off mechanism provided by the ring macros). Backends must set
23 * Back->front notifications: When enqueuing a new response, sending a
24 * notification can be made conditional on rsp_event (i.e., the generic
25 * hold-off mechanism provided by the ring macros). Frontends must set
47 * Any specified default value is in effect if the corresponding XenBus node
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| /qemu/docs/tools/ |
| H A D | qemu-nbd.rst | 1 .. _qemu-nbd:
8 --------
10 **qemu-nbd** [*OPTION*]... *filename*
12 **qemu-nbd** -L [*OPTION*]...
14 **qemu-nbd** -d *dev*
17 -----------
23 - Bind a /dev/nbdX block device to a QEMU server (on Linux).
24 - As a client to query exports of a remote NBD server.
27 -------
29 .. program:: qemu-nbd
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| /qemu/rust/qemu-api/src/ |
| H A D | lib.rs | 3 // SPDX-License-Identifier: GPL-2.0-or-later
11 // preserve one-item-per-"use" syntax, it is clearer
12 // for prelude-like modules
48 ) -> bindings::gpointer; in g_aligned_alloc0()
54 fn qemu_memalign(alignment: usize, size: usize) -> *mut c_void; in qemu_memalign()
59 fn g_malloc0(n_bytes: bindings::gsize) -> bindings::gpointer; in g_malloc0()
65 /// It is enabled by default with the `allocator` feature.
85 // From the glibc documentation, on GNU systems, malloc guarantees 16-byte
86 // alignment on 64-bit systems and 8-byte alignment on 32-bit systems. See
87 // https://www.gnu.org/software/libc/manual/html_node/Malloc-Examples.html.
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| /qemu/docs/about/ |
| H A D | emulation.rst | 5 number of CPU architectures on any supported host platform. Both
7 depending on the guest architecture.
9 .. list-table:: Supported Guest Architectures for Emulation
11 :header-rows: 1
13 * - Architecture (qemu name)
14 - System
15 - User
16 - Notes
17 * - Alpha
18 - Yes
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| /qemu/docs/interop/ |
| H A D | qemu-ga.rst | 1 .. _qemu-ga:
7 --------
9 **qemu-ga** [*OPTIONS*]
12 -----------
18 - get information from the guest
19 - set the guest's system time
20 - read/write a file
21 - sync and freeze the filesystems
22 - suspend the guest
23 - reconfigure guest local processors
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