qemu/docs/bypass-iommu.txt

10 passthrough devices with no-iommu mode and devices go through vIOMMU in
14 determine whether the devices attached on the PCI host bridge will bypass
18 the attached devices will go through vIOMMU by default.
22 The bypass iommu feature support PXB host bridge and default main host
25 the 'q35' machine type on x86 architecture and the 'virt' machine type
26 on AArch64. Other machine types do not support bypass iommu for default
31      qemu -device pxb-pcie,bus_nr=0x10,addr=0x1,bypass_iommu=true
32  (2) Arm default host bridge
33      qemu -machine virt,iommu=smmuv3,default_bus_bypass_iommu=true
34  (3) X86 default root bus bypass iommu:
35      qemu -machine q35,default_bus_bypass_iommu=true
37 2. Here is the detailed qemu command line for 'virt' machine with PXB on
40 qemu-system-aarch64 \
41  -machine virt,kernel_irqchip=on,iommu=smmuv3,default_bus_bypass_iommu=true \
42  -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1 \
43  -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x3.0x2,bypass_iommu=true \
46  - a default host bridge which bypass SMMUv3
47  - a pxb host bridge which go through SMMUv3
48  - a pxb host bridge which bypass SMMUv3
50 3. Here is the detailed qemu command line for 'q35' machine with PXB on
53 qemu-system-x86_64 \
54  -machine q35,accel=kvm,default_bus_bypass_iommu=true \
55  -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3 \
56  -device pxb-pcie,bus_nr=0x20,id=pci.20,bus=pcie.0,addr=0x4,bypass_iommu=true \
57  -device intel-iommu \
60  - a default host bridge which bypass iommu
61  - a pxb host bridge which go through iommu
62  - a pxb host bridge which bypass iommu
74  - Address space
77  - Arm SMMUv3 support
80  - X86 IOMMU support
85  - Machine and PXB options
86    We add bypass iommu options in machine option for default root bus, and add
87    option for PXB also. Note that the default value of bypass iommu is false,
88    so that the devices will by default go through iommu if there exist one.