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/qemu/hw/audio/
H A Dcs4231.c2 * QEMU Crystal CS4231 audio chip emulation
33 * In addition to Crystal CS4231 there is a DMA controller on Sparc.
H A Dcs4231a.c2 * QEMU Crystal CS4231 audio chip emulation
710 dc->desc = "Crystal Semiconductor CS4231A"; in cs4231a_class_initfn()
/qemu/hw/misc/
H A Dimx8mp_ccm.c19 #define CKIH_FREQ 16000000 /* 16MHz crystal input */
H A Dimx25_ccm.c98 #define CKIH_FREQ 24000000 /* 24MHz crystal input */
H A Dimx7_ccm.c21 #define CKIH_FREQ 24000000 /* 24MHz crystal input */
H A Dimx31_ccm.c20 #define CKIH_FREQ 26000000 /* 26MHz crystal input */
H A Dimx6_ccm.c232 #define CKIH_FREQ 24000000 /* 24MHz crystal input */
H A Dimx6ul_ccm.c282 #define CKIH_FREQ 24000000 /* 24MHz crystal input */
/qemu/docs/sphinx-static/
H A Dtheme_overrides.css254 /* gaze ye into the crystal ball to determine feature availability */
/qemu/target/loongarch/
H A Dcpu.c471 env->cpucfg[4] = 100 * 1000 * 1000; /* Crystal frequency */ in loongarch_la464_initfn()
/qemu/target/i386/kvm/
H A Dtdx.c1005 "Unable to set core crystal clock frequency to 25MHz"); in tdx_pre_create_vcpu()
/qemu/hw/mips/
H A Dmalta.c990 /* Crystal 4281 Sound */ in malta_pci_slot_get_pirq()
/qemu/hw/sh4/
H A Dsh7750_regs.h536 #define SH7750_RCR2_RTCEN 0x08 /* RTC Crystal Oscillator is Operated */