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/linux-6.8/tools/testing/selftests/netfilter/
Dnft_meta.sh5 # Kselftest framework requirement - SKIP code is 4.
7 sfx=$(mktemp -u "XXXXXXXX")
8 ns0="ns0-$sfx"
10 if ! nft --version > /dev/null 2>&1; then
21 ip -net "$ns0" link set lo up
22 ip -net "$ns0" addr add 127.0.0.1 dev lo
27 lastyear=$((currentyear-1))
28 ip netns exec "$ns0" nft -f /dev/stdin <<EOF
30 counter iifcount {}
31 counter iifnamecount {}
[all …]
Dconntrack_icmp_related.sh3 # check that ICMP df-needed/pkttoobig icmp are set are set as related
8 # nsclient1 -> nsrouter1 -> nsrouter2 -> nsclient2
9 # MTU 1500, except for nsrouter2 <-> nsclient2 link (1280).
15 # nat of "established" icmp-echo "connection".
17 # Kselftest framework requirement - SKIP code is 4.
21 nft --version > /dev/null 2>&1
22 if [ $? -ne 0 ];then
27 ip -Version > /dev/null 2>&1
28 if [ $? -ne 0 ];then
34 for i in 1 2;do ip netns del nsclient$i;done
[all …]
Dnft_nat.sh6 # Kselftest framework requirement - SKIP code is 4.
11 sfx=$(mktemp -u "XXXXXXXX")
12 ns0="ns0-$sfx"
13 ns1="ns1-$sfx"
14 ns2="ns2-$sfx"
18 for i in 0 1 2; do ip netns del ns$i-"$sfx";done
21 nft --version > /dev/null 2>&1
22 if [ $? -ne 0 ];then
27 ip -Version > /dev/null 2>&1
28 if [ $? -ne 0 ];then
[all …]
Dconntrack_vrf.sh29 # that any fix to test case 1 won't break masquerade again.
38 sfx=$(mktemp -u "XXXXXXXX")
39 ns0="ns0-$sfx"
40 ns1="ns1-$sfx"
50 nft --version > /dev/null 2>&1
51 if [ $? -ne 0 ];then
56 ip -Version > /dev/null 2>&1
57 if [ $? -ne 0 ];then
63 if [ $? -ne 0 ];then
71 ip netns exec $ns0 sysctl -q -w net.ipv4.conf.default.rp_filter=0
[all …]
/linux-6.8/drivers/comedi/drivers/
Dni_tio.c1 // SPDX-License-Identifier: GPL-2.0+
11 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
19 * This module is not used directly by end-users. Rather, it
22 * originally based on the counter code from ni_660x.c and
26 * DAQ 660x Register-Level Programmer Manual (NI 370505A-01)
27 * DAQ 6601/6602 User Manual (NI 322137B-01)
28 * 340934b.pdf DAQ-STC reference manual
43 #define NI_M_PFI_CLK(x) (((x) < 10) ? (1 + (x)) : (0xb + (x)))
48 #define NI_M_PXI_STAR_TRIGGER_CLK 0x14 /* Gi_Src_SubSelect=1 */
51 #define NI_M_ANALOG_TRIGGER_OUT_CLK 0x1e /* Gi_Src_SubSelect=1 */
[all …]
Dni_tiocmd.c1 // SPDX-License-Identifier: GPL-2.0+
11 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
19 * This module is not used directly by end-users. Rather, it
26 * DAQ 660x Register-Level Programmer Manual (NI 370505A-01)
27 * DAQ 6601/6602 User Manual (NI 322137B-01)
28 * 340934b.pdf DAQ-STC reference manual
38 static void ni_tio_configure_dma(struct ni_gpct *counter, in ni_tio_configure_dma() argument
41 struct ni_gpct_device *counter_dev = counter->counter_dev; in ni_tio_configure_dma()
42 unsigned int cidx = counter->counter_index; in ni_tio_configure_dma()
55 ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx), mask, bits); in ni_tio_configure_dma()
[all …]
/linux-6.8/arch/arm/include/asm/
Datomic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
25 #define arch_atomic_read(v) READ_ONCE((v)->counter)
26 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i))
42 prefetchw(&v->counter); \
44 "1: ldrex %0, [%3]\n" \
46 " strex %1, %0, [%3]\n" \
47 " teq %1, #0\n" \
48 " bne 1b" \
49 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
50 : "r" (&v->counter), "Ir" (i) \
[all …]
/linux-6.8/tools/perf/
Ddesign.txt3 ------------------------------
7 as instructions executed, cachemisses suffered, or branches mis-predicted -
9 trigger interrupts when a threshold number of events have passed - and can
12 The Linux Performance Counter subsystem provides an abstraction of these
13 hardware capabilities. It provides per task and per CPU counters, counter
15 provides "virtual" 64-bit counters, regardless of the width of the
19 There's one file descriptor per virtual counter used.
29 VFS system calls: read() can be used to read the counter, fcntl()
35 When creating a new counter fd, 'perf_event_attr' is:
40 * specific (raw) counter configuration data, if unset, the next
[all …]
/linux-6.8/drivers/counter/
Di8254.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/counter.h>
25 #define I8254_M GENMASK(3, 1)
32 #define I8254_MODE_HARDWARE_RETRIGGERABLE_ONESHOT 1
44 * struct i8254 - I8254 device private data structure
46 * @preset: array of Counter Register states
57 static int i8254_count_read(struct counter_device *const counter, struct counter_count *const count, in i8254_count_read() argument
60 struct i8254 *const priv = counter_priv(counter); in i8254_count_read()
64 mutex_lock(&priv->lock); in i8254_count_read()
66 ret = regmap_write(priv->map, I8254_CONTROL_REG, I8254_COUNTER_LATCH(count->id)); in i8254_count_read()
[all …]
Drz-mtu3-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RZ/G2L MTU3a Counter driver
9 #include <linux/counter.h>
10 #include <linux/mfd/rz-mtu3.h>
19 * TMDR1: Timer Mode Register 1
23 * TCNT: Timer Counter
25 * TCNTLW: Timer Longword Counter
31 #define RZ_MTU3_TMDR1_PH_CNT_MODE_1 (4) /* Phase counting mode 1 */
40 * 0: 16-bit, 1: 32-bit
46 * 0: MTCLKA and MTCLKB, 1: MTCLKC and MTCLKD
[all …]
Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
10 #include <linux/counter.h>
11 #include <linux/mfd/stm32-timers.h>
46 static int stm32_count_read(struct counter_device *counter, in stm32_count_read() argument
49 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_read()
52 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
58 static int stm32_count_write(struct counter_device *counter, in stm32_count_write() argument
61 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_write()
64 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
[all …]
Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
14 #include <linux/counter.h>
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
62 ret = regmap_write(priv->regmap, STM32_LPTIM_ARR, priv->ceiling); in stm32_lptim_set_enable_state()
[all …]
Dftm-quaddec.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/counter.h>
37 if (ftm->big_endian) in ftm_read()
38 *data = ioread32be(ftm->ftm_base + offset); in ftm_read()
40 *data = ioread32(ftm->ftm_base + offset); in ftm_read()
45 if (ftm->big_endian) in ftm_write()
46 iowrite32be(data, ftm->ftm_base + offset); in ftm_write()
48 iowrite32(data, ftm->ftm_base + offset); in ftm_write()
60 FTM_FIELD_UPDATE(ftm, FTM_MODE, FTM_MODE_WPDIS, 1); in ftm_clear_write_protection()
65 FTM_FIELD_UPDATE(ftm, FTM_FMS, FTM_FMS_WPEN, 1); in ftm_set_write_protection()
[all …]
/linux-6.8/drivers/net/fddi/skfp/h/
Dfddimib.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 typedef u_long Counter ; typedef
29 Counter count ;
36 #define MIB_PATH_P (1<<0)
37 #define MIB_PATH_S (1<<1)
38 #define MIB_PATH_L (1<<2)
43 #define MIB_P_PATH_LOCAL (1<<0)
44 #define MIB_P_PATH_SEC_ALTER (1<<1)
45 #define MIB_P_PATH_PRIM_ALTER (1<<2)
46 #define MIB_P_PATH_CON_ALTER (1<<3)
[all …]
/linux-6.8/drivers/net/ethernet/marvell/prestera/
Dprestera_counter.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
41 COUNTER_FLAG_INVALID = 1
47 return block->counter_flag[id - block->offset] == COUNTER_FLAG_READY; in prestera_counter_is_ready()
50 static void prestera_counter_lock(struct prestera_counter *counter) in prestera_counter_lock() argument
52 mutex_lock(&counter->mtx); in prestera_counter_lock()
55 static void prestera_counter_unlock(struct prestera_counter *counter) in prestera_counter_unlock() argument
57 mutex_unlock(&counter->mtx); in prestera_counter_unlock()
62 mutex_lock(&block->mtx); in prestera_counter_block_lock()
67 mutex_unlock(&block->mtx); in prestera_counter_block_unlock()
72 return refcount_inc_not_zero(&block->refcnt); in prestera_counter_block_incref()
[all …]
/linux-6.8/arch/arm/kernel/
Dperf_event_v6.c1 // SPDX-License-Identifier: GPL-2.0
3 * ARMv6 Performance counter handling code.
7 * ARMv6 has 2 configurable performance counters and a single cycle counter.
16 * the event bus. The procedure for disabling a configurable counter is:
17 * - change the counter to count the ETMEXTOUT[0] signal (0x20). This
18 * effectively stops the counter from counting.
19 * - disable the counter's interrupt generation (each counter has it's
21 * Once stopped, the counter value can be written as 0 to reset.
23 * To enable a counter:
24 * - enable the counter's interrupt generation.
[all …]
/linux-6.8/arch/s390/kernel/
Dperf_cpum_cf.c1 // SPDX-License-Identifier: GPL-2.0
3 * Performance event support for s390x - CPU-measurement Counter Facility
26 CPUMF_CTR_SET_BASIC = 0, /* Basic Counter Set */
27 CPUMF_CTR_SET_USER = 1, /* Problem-State Counter Set */
28 CPUMF_CTR_SET_CRYPTO = 2, /* Crypto-Activity Counter Set */
29 CPUMF_CTR_SET_EXT = 3, /* Extended Counter Set */
30 CPUMF_CTR_SET_MT_DIAG = 4, /* MT-diagnostic Counter Set */
32 /* Maximum number of counter sets */
86 unsigned char start[PAGE_SIZE]; /* Counter set at event add */
87 unsigned char stop[PAGE_SIZE]; /* Counter set at event delete */
[all …]
/linux-6.8/arch/powerpc/include/asm/
Datomic.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <asm/asm-const.h>
17 * a "bne-" instruction at the end, so an isync is enough as a acquire barrier
30 /* -mprefixed can generate offsets beyond range, fall back hack */ in arch_atomic_read()
32 __asm__ __volatile__("lwz %0,0(%1)" : "=r"(t) : "b"(&v->counter)); in arch_atomic_read()
34 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m<>"(v->counter)); in arch_atomic_read()
41 /* -mprefixed can generate offsets beyond range, fall back hack */ in arch_atomic_set()
43 __asm__ __volatile__("stw %1,0(%2)" : "=m"(v->counter) : "r"(i), "b"(&v->counter)); in arch_atomic_set()
45 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m<>"(v->counter) : "r"(i)); in arch_atomic_set()
54 "1: lwarx %0,0,%3 # atomic_" #op "\n" \
[all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/lunarlake/
Dpipeline.json6 "PEBS": "1",
15 "PEBS": "1",
24 "PEBS": "1",
25-speculative execution path is known. The branch prediction unit (BPU) predicts the target address…
33 "PEBS": "1",
39 "BriefDescription": "Fixed Counter: Counts the number of unhalted core clock cycles",
53 "BriefDescription": "Fixed Counter: Counts the number of unhalted reference clock cycles",
62counter. This event can approximate elapsed time while the core was not in a halt state. Note: On …
71counter. This event can approximate elapsed time while the core was not in a halt state. Note: On …
79 …e the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eigh…
[all …]
/linux-6.8/arch/x86/include/asm/
Datomic64_64.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* The 64-bit atomic type */
15 return __READ_ONCE((v)->counter); in arch_atomic64_read()
20 __WRITE_ONCE(v->counter, i); in arch_atomic64_set()
25 asm volatile(LOCK_PREFIX "addq %1,%0" in arch_atomic64_add()
26 : "=m" (v->counter) in arch_atomic64_add()
27 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_add()
32 asm volatile(LOCK_PREFIX "subq %1,%0" in arch_atomic64_sub()
33 : "=m" (v->counter) in arch_atomic64_sub()
34 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_sub()
[all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/graniterapids/
Dpipeline.json6 "PEBS": "1",
14 "PEBS": "1",
21counter. This event can approximate elapsed time while the core was not in a halt state. It is cou…
29counter. This event can approximate elapsed time while the core was not in a halt state. It is cou…
36 …e the core was not in the halt state. It is counted on a dedicated fixed counter, leaving the eigh…
48 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
50 "PEBS": "1",
51- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
56 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
59 "PEBS": "1",
[all …]
/linux-6.8/arch/x86/kernel/cpu/
Dperfctr-watchdog.c1 // SPDX-License-Identifier: GPL-2.0
37 * - different performance counters/ event selection may be reserved for
47 /* returns the bit offset of the performance counter register */ in nmi_perfctr_msr_to_bit()
52 return (msr - MSR_F15H_PERF_CTR) >> 1; in nmi_perfctr_msr_to_bit()
53 return msr - MSR_K7_PERFCTR0; in nmi_perfctr_msr_to_bit()
56 return msr - MSR_ARCH_PERFMON_PERFCTR0; in nmi_perfctr_msr_to_bit()
60 return msr - MSR_P6_PERFCTR0; in nmi_perfctr_msr_to_bit()
62 return msr - MSR_KNC_PERFCTR0; in nmi_perfctr_msr_to_bit()
64 return msr - MSR_P4_BPU_PERFCTR0; in nmi_perfctr_msr_to_bit()
69 return msr - MSR_ARCH_PERFMON_PERFCTR0; in nmi_perfctr_msr_to_bit()
[all …]
/linux-6.8/include/linux/
Dtimecounter.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #define CYCLECOUNTER_MASK(bits) (u64)((bits) < 64 ? ((1ULL<<(bits))-1) : -1)
17 * struct cyclecounter - hardware abstraction for a free running counter
18 * Provides completely state-free accessors to the underlying hardware.
19 * Depending on which hardware it reads, the cycle counter may wrap
38 * struct timecounter - layer above a %struct cyclecounter which counts nanoseconds
40 * cycle counter wrap around. Initialize with
44 * cycle counter hardware, locking issues and reading the time
45 * more often than the cycle counter wraps around. The nanosecond
46 * counter will only wrap around after ~585 years.
[all …]
/linux-6.8/tools/perf/pmu-events/arch/s390/cf_zec12/
Dbasic.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "This counter counts the total number of CPU cycles, excluding the number of …
10 "Unit": "CPU-M-CF",
11 "EventCode": "1",
14 "PublicDescription": "This counter counts the total number of instructions executed by the CPU."
17 "Unit": "CPU-M-CF",
20 "BriefDescription": "Level-1 I-Cache Directory Write Count",
21 …"PublicDescription": "This counter counts the total number of level-1 instruction-cache or unified
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
[all …]
/linux-6.8/tools/perf/pmu-events/arch/s390/cf_z13/
Dbasic.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "This counter counts the total number of CPU cycles, excluding the number of …
10 "Unit": "CPU-M-CF",
11 "EventCode": "1",
14 "PublicDescription": "This counter counts the total number of instructions executed by the CPU."
17 "Unit": "CPU-M-CF",
20 "BriefDescription": "Level-1 I-Cache Directory Write Count",
21 …"PublicDescription": "This counter counts the total number of level-1 instruction-cache or unified
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
[all …]

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