| /linux-6.15/Documentation/iio/ |
| D | ad4030.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
16 * `AD4030-24 <https://www.analog.com/AD4030-24>`_
17 * `AD4032-24 <https://www.analog.com/AD4032-24>`_
18 * `AD4630-16 <https://www.analog.com/AD4630-16>`_
19 * `AD4630-24 <https://www.analog.com/AD4630-24>`_
20 * `AD4632-16 <https://www.analog.com/AD4632-16>`_
21 * `AD4632-24 <https://www.analog.com/AD4632-24>`_
26 Each "hardware" channel as described in the datasheet is split in 2 IIO
29 - One channel for the differential data
30 - One channel for the common byte.
[all …]
|
| D | iio_adc.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
12 device drivers. This documentation describes common ADC features and explains
15 1. ADC Channel Types
21 the input polarity. The input range allowed to an ADC channel is needed to
23 real-world units (millivolts for voltage measurement, milliamps for current
32 There are three general types of ADC inputs (single-ended, differential,
33 pseudo-differential) and two possible polarities (unipolar, bipolar). The input
34 type (single-ended, differential, pseudo-differential) is one channel
38 https://www.analog.com/en/resources/technical-articles/sar-adc-input-types.html.
40 1.1 Single-ended channels
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad4695.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of similar multi-channel analog to digital converters with SPI bus.
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad4695
27 - adi,ad4696
28 - adi,ad4697
[all …]
|
| D | adc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IIO Common Properties for ADC Channels
10 - Jonathan Cameron <jic23@kernel.org>
13 A few properties are defined in a common way ADC channels.
17 pattern: "^channel(@[0-9a-f]+)?$"
19 A channel index should match reg.
25 description: Unique name to identify which channel this is.
29 description: If provided, the channel is to be used in bipolar mode.
[all …]
|
| D | adi,ad7173.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
16 can be used in high precision, low noise single channel applications
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
[all …]
|
| D | adi,ad7380.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
21 * https://www.analog.com/en/products/ad7380-4.html
22 * https://www.analog.com/en/products/ad7381-4.html
23 * https://www.analog.com/en/products/ad7383-4.html
24 * https://www.analog.com/en/products/ad7384-4.html
25 * https://www.analog.com/en/products/ad7386-4.html
[all …]
|
| /linux-6.15/drivers/dma/ |
| D | fsldma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
18 * command. Please be aware that this setting may result in read pre-fetching
29 #include <linux/dma-mapping.h>
40 dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg)
42 dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
52 FSL_DMA_OUT(chan, &chan->regs->sr, val, 32); in set_sr()
57 return FSL_DMA_IN(chan, &chan->regs->sr, 32); in get_sr()
62 FSL_DMA_OUT(chan, &chan->regs->mr, val, 32); in set_mr()
67 return FSL_DMA_IN(chan, &chan->regs->mr, 32); in get_mr()
[all …]
|
| /linux-6.15/net/ncsi/ |
| D | ncsi-rsp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "ncsi-pkt.h"
20 #include "ncsi-netlink.h"
46 h = (struct ncsi_rsp_pkt_hdr *)skb_network_header(nr->rsp); in ncsi_validate_rsp_pkt()
48 if (h->common.revision != NCSI_PKT_REVISION) { in ncsi_validate_rsp_pkt()
49 netdev_dbg(nr->ndp->ndev.dev, in ncsi_validate_rsp_pkt()
51 return -EINVAL; in ncsi_validate_rsp_pkt()
53 if (ntohs(h->common.length) != payload) { in ncsi_validate_rsp_pkt()
54 netdev_dbg(nr->ndp->ndev.dev, in ncsi_validate_rsp_pkt()
56 return -EINVAL; in ncsi_validate_rsp_pkt()
[all …]
|
| D | ncsi-pkt.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 unsigned char revision; /* NCSI version - 0x01 */
15 unsigned char channel; /* Network controller ID */ member
21 struct ncsi_pkt_hdr common; /* Common NCSI packet header */ member
25 struct ncsi_pkt_hdr common; /* Common NCSI packet header */ member
31 struct ncsi_pkt_hdr common; /* Common NCSI packet header */ member
36 /* NCSI common command packet */
58 /* Disable Channel */
67 /* Reset Channel */
80 __be32 mode; /* AEN working mode */ member
[all …]
|
| /linux-6.15/arch/arm/mach-omap2/ |
| D | vc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
19 #include "prm-regbits-34xx.h"
20 #include "prm-regbits-44xx.h"
52 * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
59 * Channel configuration bits, common for OMAP3+
82 * configuration, except the OMAP4 MPU channel. This appears
83 * to be a freak accident as every other VC channel has the
84 * default configuration, thus creating a mutant channel config.
101 * omap_vc_config_channel - configure VC channel to PMIC mappings
102 * @voltdm: pointer to voltagdomain defining the desired VC channel
[all …]
|
| D | vc.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
22 * struct omap_vc_common - per-VC register/bitfield data
34 * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register
35 * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
63 * struct omap_vc_channel - VC per-instance data
64 * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
67 * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
68 * @cfg_channel: current value of VC channel configuration register
69 * @i2c_high_speed: whether or not to use I2C high-speed mode
71 * @common: pointer to VC common data for this platform
[all …]
|
| /linux-6.15/drivers/iio/adc/ |
| D | ad4030.c | 1 // SPDX-License-Identifier: GPL-2.0-only
93 * This accounts for 1 sample per channel plus one s64 for the timestamp,
109 #define AD4030_TCYC_ADJUSTED_NS (AD4030_TCYC_NS - AD4030_TCNVL_NS)
112 #define AD4632_TCYC_ADJUSTED_NS (AD4632_TCYC_NS - AD4030_TCNVL_NS)
156 enum ad4030_out_mode mode; member
167 u8 common; member
171 u8 common[2]; member
177 * For a chip with 2 hardware channel this will be used to create 2 common-mode
179 * - voltage4
180 * - voltage5
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/display/ |
| D | dsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for DSI Display Panels
10 - Linus Walleij <linus.walleij@linaro.org>
13 This document defines device tree properties common to DSI, Display
25 channel should have a node "panel" for their virtual channel with their
26 reg-property set to the virtual channel number, usually there is just
27 one virtual channel, number 0.
[all …]
|
| /linux-6.15/drivers/dma/xilinx/ |
| D | zynqmp_dma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/dma-mapping.h>
19 #include <linux/io-64-nonatomic-lo-hi.h>
25 #define ZYNQMP_DMA_ISR (chan->irq_offset + 0x100)
26 #define ZYNQMP_DMA_IMR (chan->irq_offset + 0x104)
27 #define ZYNQMP_DMA_IER (chan->irq_offset + 0x108)
28 #define ZYNQMP_DMA_IDS (chan->irq_offset + 0x10c)
118 /* Max number of descriptors per channel */
141 #define ZYNQMP_DMA_DESC_SIZE(chan) (chan->desc_size)
144 common)
[all …]
|
| D | xilinx_dma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
11 * core that provides high-bandwidth direct memory access between memory
12 * and AXI4-Stream type video target peripherals. The core provides efficient
14 * and write (MM2S) channel operation. It can be configured to have either
15 * one channel or two channels. If configured as two channels, one is to
18 * registers are accessed through an AXI4-Lite slave interface.
21 * provides high-bandwidth one dimensional direct memory access between memory
22 * and AXI4-Stream target peripherals. It supports one receive and one
23 * transmit channel, both of them optional at synthesis time.
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/leds/ |
| D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
14 Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
[all …]
|
| /linux-6.15/drivers/net/wireless/ath/ath9k/ |
| D | ar9003_phy.c | 2 * Copyright (c) 2010-2011 Atheros Communications Inc.
39 { -4, -2, 0, 2, 4, 6, 8, 10, 12 }; /* lvl 0-8, default 2 */
43 { -6, -4, -2, 0, 2, 4, 6, 8 }; /* lvl 0-7, default 3 */
125 * ar9003_hw_set_channel - set channel on single-chip device
129 * This is the function to change channel on single-chip devices, that is
132 * This function takes the channel value in MHz and sets
133 * hardware channel value. Assumes writes have been enabled to analog bus.
137 * For 2GHz channel,
138 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
141 * For 5GHz channel,
[all …]
|
| D | htc_drv_main.c | 2 * Copyright (c) 2010-2011 Atheros Communications Inc.
34 enum ath9k_power_mode mode) in ath9k_htc_setpower() argument
38 mutex_lock(&priv->htc_pm_lock); in ath9k_htc_setpower()
39 ret = ath9k_hw_setpower(priv->ah, mode); in ath9k_htc_setpower()
40 mutex_unlock(&priv->htc_pm_lock); in ath9k_htc_setpower()
47 mutex_lock(&priv->htc_pm_lock); in ath9k_htc_ps_wakeup()
48 if (++priv->ps_usecount != 1) in ath9k_htc_ps_wakeup()
50 ath9k_hw_setpower(priv->ah, ATH9K_PM_AWAKE); in ath9k_htc_ps_wakeup()
53 mutex_unlock(&priv->htc_pm_lock); in ath9k_htc_ps_wakeup()
60 mutex_lock(&priv->htc_pm_lock); in ath9k_htc_ps_restore()
[all …]
|
| /linux-6.15/drivers/net/can/rcar/ |
| D | rcar_canfd.c | 1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN FD device driver
7 /* The R-Car CAN FD controller can operate in either one of the below two modes
8 * - CAN FD only mode
9 * - Classical CAN (CAN 2.0) only mode
11 * This driver puts the controller in CAN FD only mode by default. In this
12 * mode, the controller acts as a CAN FD node that can also interoperate with
15 * To switch the controller to Classical CAN (CAN 2.0) only mode, add
16 * "renesas,no-can-fd" optional property to the device tree node. A h/w reset is
73 /* Non-operational status */
[all …]
|
| /linux-6.15/Documentation/devicetree/bindings/sound/ |
| D | microchip,sama7g5-i2smcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I2S Multi-Channel Controller
10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and
15 multi-channel audio codecs. It consists of a receiver, a transmitter and a
16 common clock generator that can be enabled separately to provide Adapter,
19 multi-channel is supported by using multiple data pins, output and
[all …]
|
| /linux-6.15/drivers/net/wireless/ath/ath5k/ |
| D | reset.c | 2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Luis Rodriguez <mcgrof@winlab.rutgers.edu>
5 * Copyright (c) 2007-2008 Pavel Roskin <proski@gnu.org>
6 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
30 #include <linux/pci.h> /* To determine if a card is pci-e */
52 * ath5k_hw_register_timeout() - Poll a register for a flag/field change
64 * Returns -EAGAIN if we exceeded AR5K_TUNE_REGISTER_TIMEOUT * 15us or 0
73 for (i = AR5K_TUNE_REGISTER_TIMEOUT; i > 0; i--) { in ath5k_hw_register_timeout()
82 return (i <= 0) ? -EAGAIN : 0; in ath5k_hw_register_timeout()
[all …]
|
| D | ath5k.h | 2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
21 /* TODO: Clean up channel debugging (doesn't work anyway) and start
40 * and clean up common bits, then introduce set/get functions in eeprom.c */
62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8 0x0058 /* AR5312 WMAC (AP43-030) */
70 #define PCI_DEVICE_ID_ATHEROS_AR2413 0x001a /* AR2413 (Griffin-lite) */
72 #define PCI_DEVICE_ID_ATHEROS_AR5424 0x001c /* AR5424 (Condor PCI-E) */
189 #define AR5K_TUNE_NOISE_FLOOR -72
190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95
[all …]
|
| /linux-6.15/drivers/net/wireless/rsi/ |
| D | rsi_91x_mgmt.c | 268 * rsi_set_default_parameters() - This function sets default parameters.
269 * @common: Pointer to the driver private structure.
273 static void rsi_set_default_parameters(struct rsi_common *common) in rsi_set_default_parameters() argument
275 common->band = NL80211_BAND_2GHZ; in rsi_set_default_parameters()
276 common->channel_width = BW_20MHZ; in rsi_set_default_parameters()
277 common->rts_threshold = IEEE80211_MAX_RTS_THRESHOLD; in rsi_set_default_parameters()
278 common->channel = 1; in rsi_set_default_parameters()
279 memset(&common->rate_config, 0, sizeof(common->rate_config)); in rsi_set_default_parameters()
280 common->fsm_state = FSM_CARD_NOT_READY; in rsi_set_default_parameters()
281 common->iface_down = true; in rsi_set_default_parameters()
[all …]
|
| /linux-6.15/drivers/media/platform/ti/davinci/ |
| D | vpif_capture.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <media/v4l2-fwnode.h>
17 #include <media/v4l2-ioctl.h>
19 #include <media/v4l2-mediabus.h>
38 MODULE_PARM_DESC(debug, "Debug level 0-1");
71 struct vb2_queue *q = vb->vb2_queue; in vpif_buffer_prepare()
73 struct common_obj *common; in vpif_buffer_prepare() local
78 common = &ch->common[VPIF_VIDEO_INDEX]; in vpif_buffer_prepare()
80 vb2_set_plane_payload(vb, 0, common->fmt.fmt.pix.sizeimage); in vpif_buffer_prepare()
82 return -EINVAL; in vpif_buffer_prepare()
[all …]
|
| /linux-6.15/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-adc-hi8435 | 7 Could be either "GND-Open" or "Supply-Open" mode. Y is a
8 threshold detector input channel. Channels 0..7, 8..15, 16..23
9 and 24..31 has common sensor types.
16 Channel Y low voltage threshold. If sensor input voltage goes lower then
19 is separately set for "GND-Open" and "Supply-Open" modes.
20 Channels 0..31 have common low threshold values, but could have different
35 Channel Y high voltage threshold. If sensor input voltage goes higher then
38 is separately set for "GND-Open" and "Supply-Open" modes.
40 Channels 0..31 have common high threshold values, but could have different
|