Searched full:clkcfg (Results 1 – 6 of 6) sorted by relevance
| /linux-3.3/arch/arm/mach-pxa/ |
| D | pxa27x.c | 78 unsigned long ccsr, clkcfg; in pxa27x_get_clk_frequency_khz() local
85 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ in pxa27x_get_clk_frequency_khz()
86 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); in pxa27x_get_clk_frequency_khz()
87 t = clkcfg & (1 << 0); in pxa27x_get_clk_frequency_khz()
88 ht = clkcfg & (1 << 2); in pxa27x_get_clk_frequency_khz()
89 b = clkcfg & (1 << 3); in pxa27x_get_clk_frequency_khz()
120 unsigned long ccsr, clkcfg; in clk_pxa27x_mem_getrate() local
127 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ in clk_pxa27x_mem_getrate()
128 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); in clk_pxa27x_mem_getrate()
129 b = clkcfg & (1 << 3); in clk_pxa27x_mem_getrate()
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| D | sleep.S | 73 mov r0, #0x2 @ prepare value for CLKCFG
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| D | cpufreq-pxa2xx.c | 129 * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
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| /linux-3.3/drivers/gpu/drm/i915/ |
| D | intel_dp.c | 284 uint32_t clkcfg; in intel_hrawclk() local
286 clkcfg = I915_READ(CLKCFG); in intel_hrawclk()
287 switch (clkcfg & CLKCFG_FSB_MASK) { in intel_hrawclk()
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| D | i915_dma.c | 1335 tmp = I915_READ(CLKCFG); in i915_pineview_get_mem_freq()
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| D | i915_reg.h | 1041 #define CLKCFG 0x10c00 macro
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