| /qemu/tests/functional/acpi-bits/bits-tests/ |
| H A D | smbios.py2 | 244 9: 'Daughter Board',
248 0xD: 'Interconnect Board'
431 0x03: 'Daughter Board',
703 0x16: 'On Board IDE',
704 0x17: 'On Board Floppy',
709 0x1C: 'On Board Sound Input from CD-ROM',
1090 0x03: "System board or motherboard",
1697 0b01100: 'Front Panel Board',
1698 0b01101: 'Back Panel Board',
1699 0b01110: 'Power System Board',
[all …]
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| /qemu/include/hw/timer/ |
| H A D | sse-counter.h | 26 * consumer device should have a QOM link property which the board
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| /qemu/tests/functional/ |
| H A D | test_mipsel_malta.py | 3 # Functional tests for the little-endian 32-bit MIPS Malta board
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| /qemu/hw/ppc/ |
| H A D | meson.build | 83 # PowerPC 440 Xilinx ML507 reference board.
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| H A D | sam460ex.c | 2 * QEMU aCube Sam460ex board emulation
331 * Put all RAM on first bank because board has one slot in sam460ex_init()
449 /* SoC has 4 UARTs but board has only one wired and two described in fdt */ in sam460ex_init()
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| /qemu/docs/system/arm/ |
| H A D | fby35.rst | 9 baseboard with a BMC, and 4 server slots. The new server board design termed
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| H A D | vexpress.rst | 5 board family:
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| /qemu/hw/arm/ |
| H A D | aspeed_ast10x0.c | 199 error_setg(errp, "sysclk clock must be wired up by the board code"); in aspeed_soc_ast1030_realize()
337 /* FMC, The number of CS is set at the board level */ in aspeed_soc_ast1030_realize()
427 /* Reason: The Aspeed SoC can only be instantiated from a board */ in aspeed_soc_ast1030_class_init()
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| H A D | imx8mp-evk.c | 98 mc->desc = "NXP i.MX 8M Plus EVK Board"; in imx8mp_evk_machine_init()
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| H A D | mps2.c | 2 * ARM V2M MPS2 board emulation.
14 * and most of the devices are in the FPGA, the details of the board
22 * Links to the TRM for the board itself and to the various Application
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| H A D | raspi4b.c | 35 * Add second memory region if board RAM amount exceeds VC base address
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| H A D | stm32f405_soc.c | 106 error_setg(errp, "refclk clock must not be wired up by the board code"); in stm32f405_soc_realize()
111 error_setg(errp, "sysclk clock must be wired up by the board code"); in stm32f405_soc_realize()
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| H A D | armv7m.c | 123 /* Board init. */
373 /* Alias the NVIC's input and output GPIOs as our own so the board in armv7m_realize()
628 * board must call this function! in armv7m_load_kernel()
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| H A D | bananapi_m2u.c | 68 /* BIOS is not supported by this board */ in bpim2u_init()
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| /qemu/hw/core/ |
| H A D | cpu-common.c | 254 * no need to check the ignore_memory_transaction_failures board flag. in cpu_common_realizefn()
385 * Reason: CPUs still need special care by board code: wiring up in cpu_common_class_init()
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| /qemu/docs/system/loongarch/ |
| H A D | virt.rst | 8 emulated devices on virt board, such as loongson7a RTC device,
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| /qemu/target/arm/ |
| H A D | cortex-regs.c | 20 * If the board didn't configure the CPUs into clusters, in l2ctlr_read()
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| /qemu/hw/misc/ |
| H A D | npcm_gcr.c | 388 …* https://github.com/Nuvoton-Israel/u-boot/blob/2aef993bd2aafeb5408dbaad0f3ce099ee40c4aa/board/nuv… in npcm_gcr_realize()
396 …* https://github.com/Nuvoton-Israel/u-boot/blob/npcm8mnx-v2019.01_tmp/board/nuvoton/arbel/arbel.c#… in npcm_gcr_realize()
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| H A D | allwinner-r40-dramc.c | 371 * to detect whether the board support dual_rank or not. Create a virtual memory
372 * if the board's ram_size less or equal than 1G, and set read time out flag of
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| /qemu/rust/qemu-api/src/ |
| H A D | irq.rs | 32 /// different polarity, that change is performed by the board between the
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| H A D | sysbus.rs | 52 /// Expose a memory region to the board so that it can give it an address
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| /qemu/include/hw/sd/ |
| H A D | sdhci.h | 8 * Based on MMC controller for Samsung S5PC1xx-based board emulation
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| /qemu/include/hw/arm/ |
| H A D | virt.h | 17 * Emulate a virtual board which works by passing Linux all the information
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| /qemu/hw/timer/ |
| H A D | imx_epit.c | 55 * Exact clock frequencies vary from board to board.
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| /qemu/pc-bios/ |
| HD | u-boot.e500 | __of_translate_address fdt_fixup_memory_banks set_tlb do_bootvx_fdt dev_get_parent_priv device_remove mpc85xx_pci_dm_probe tsec_mdio_probe phy_device_create fs_devread dev_get_uclass_priv virtio_uclass_child_pre_probe virtio_has_feature virtio_pci_set_status virtio_pci_get_config virtio_has_feature dev_get_priv virtqueue_add virtio_pci_set_features ... |