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/linux-6.8/Documentation/devicetree/bindings/serial/
Dbrcm,bcm7271-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <alcooperx@gmail.com>
13 - $ref: serial.yaml#
16 The Broadcom UART is based on the basic 8250 UART but with
23 - enum:
24 - brcm,bcm7271-uart
25 - brcm,bcm7278-uart
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/linux-6.8/include/uapi/linux/
Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
19 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
20 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
21 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
22 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
23 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
24 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
25 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
29 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
30 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
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/linux-6.8/drivers/tty/serial/8250/
D8250_of.c1 // SPDX-License-Identifier: GPL-2.0+
36 struct device *dev = &ofdev->dev; in of_platform_serial_setup()
37 struct device_node *np = dev->of_node; in of_platform_serial_setup()
38 struct uart_port *port = &up->port; in of_platform_serial_setup()
44 pm_runtime_enable(&ofdev->dev); in of_platform_serial_setup()
45 pm_runtime_get_sync(&ofdev->dev); in of_platform_serial_setup()
47 if (of_property_read_u32(np, "clock-frequency", &clk)) { in of_platform_serial_setup()
50 info->clk = devm_clk_get_enabled(dev, NULL); in of_platform_serial_setup()
51 if (IS_ERR(info->clk)) { in of_platform_serial_setup()
52 ret = dev_err_probe(dev, PTR_ERR(info->clk), "failed to get clock\n"); in of_platform_serial_setup()
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D8250_bcm7271.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * 8250-core based driver for Broadcom ns16550a UARTs
20 #include <linux/dma-mapping.h>
28 /* Register definitions for UART DMA block. Version 1.1 or later. */
157 #define UDMA_RX_BUFS_REG_OFFSET (UDMA_RX_BUF1_PTR_LO - UDMA_RX_BUF0_PTR_LO)
169 #define UDMA_TX_BUFS_REG_OFFSET (UDMA_TX_BUF1_PTR_LO - UDMA_TX_BUF0_PTR_LO)
251 return readl(priv->regs[reg_type] + offset); in udma_readl()
257 writel(value, priv->regs[reg_type] + offset); in udma_writel()
263 void __iomem *reg = priv->regs[reg_type] + offset; in udma_set()
274 void __iomem *reg = priv->regs[reg_type] + offset; in udma_unset()
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D8250_port.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Base port operations for 8250/16550-type serial ports
55 * Here we define the default xmit fifo size used for each type of UART.
248 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement
249 * workaround of errata A-008006 which states that tx_loadsz should
261 .name = "Palmchip BK-3103",
319 .name = "Broadcom BCM7271 UART",
328 /* Uart divisor latch read */
338 /* Uart divisor latch write */
347 offset = offset << p->regshift; in hub6_serial_in()
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/linux-6.8/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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