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/qemu/hw/usb/
H A Dhcd-xhci.h8 * This library is free software; you can redistribute it and/or
H A Ddesc.h136 /* conceptually an Interface Association Descriptor, and related interfaces */
/qemu/tests/unit/
H A Dio-channel-helpers.c6 * This library is free software; you can redistribute it and/or
/qemu/include/hw/ppc/
H A Dspapr.h244 /* System Reset and Machine Check Notification Routine addresses
252 * the CPU that was delivered the machine check, and is set back to -1
603 /* The hcalls above are standardized in PAPR and implemented by pHyp
853 * VIO devices, RTAS event sources and PHBs).
/qemu/hw/isa/
H A Dvt82c686.c12 * VT8231 south bridge support and general clean up to allow it
157 * Fix device model that realizes this PM device and remove in pm_update_sci()
159 * The device model should wire SCI and setup in pm_update_sci()
308 /* The floppy also uses 0x3f0 and 0x3f1 but this seems to work anyway */ in via_superio_realize()
/qemu/hw/arm/
H A Dfsl-imx8mp.c291 * Secondary CPUs start in powered-down state (and can be in fsl_imx8mp_realize()
323 * Wire the outputs from each CPU's generic timer and the GICv3 in fsl_imx8mp_realize()
324 * maintenance interrupt signal to the appropriate GIC PPI inputs, and in fsl_imx8mp_realize()
675 /* device implemented and treated above */ in fsl_imx8mp_realize()
/qemu/hw/sd/
H A Dallwinner-sdhost.c2 * Allwinner (sun4i and above) SD Host Controller emulation
6 * This program is free software: you can redistribute it and/or modify
381 /* Clear hold flag and flush descriptor */ in allwinner_sdhost_process_desc()
403 * If not, it is an error and we should not act at all in allwinner_sdhost_dma()
/qemu/hw/ppc/
H A Dpnv_occ.c6 * This program is free software; you can redistribute it and/or modify
415 * @v#.pstate_ultra_turbo: Maximum ultra turbo pstate and the maximum
417 * @v#.pstates: Pstate-id and frequency list from Pmax to Pmin
430 struct QEMU_PACKED { /* Version 0x01 and 0x02 */
/qemu/include/
H A Delf.h110 /* - 0 for MIPS V and below, */
250 /* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use
255 /* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use
900 /* relocs to generate 19, 21, and 33 bit PC-relative addresses */
1365 #define R_IA64_SUB 0x85 /* Addend and symbol difference */
1458 Elf64_Xword r_info; /* index and type of relocation */
1469 Elf64_Xword r_info; /* index and type of relocation */
1484 unsigned char st_info; /* Type and binding attributes */
/qemu/target/mips/tcg/
H A Dtranslate.c7 * Copyright (c) 2009 CodeSourcery (MIPS16 and microMIPS support)
11 * This library is free software; you can redistribute it and/or
75 /* Jump and branches */
88 /* Load and stores */
150 /* Cache and prefetch */
161 /* Instructions determined by bits 19 and 20 */
265 * R6 Multiply and Divide instructions have the same opcode
266 * and function field as legacy OPC_MULT[U]/OPC_DIV[U]
382 /* MIPS DSP Accumulator and DSPControl Access Sub-class */
675 /* MIPS DSP Accumulator and DSPControl Access Sub-class */
[all …]
H A Dvr54xx_helper.c6 * This library is free software; you can redistribute it and/or
/qemu/hw/intc/
H A Dpnv_xive2.c755 * The TIMA MMIO space is shared among the chips and to identify the
858 * entries provisioned by FW (such as skiboot) and resize the in pnv_xive2_vst_set_exclusive()
903 * Both PC and VC sub-engines are configured as each use the Virtual
1623 * The Xive2Router model combines both VC and PC sub-engines. We in pnv_xive2_ic_pc_write()
1627 * firmware passes the same address to the VC and PC when tables in pnv_xive2_ic_pc_write()
1858 * Notify port page. The layout is compatible between 4K and 64K pages :
2344 /* VC and PC cache watch assign mechanism */ in pnv_xive2_reset()
2365 * Maximum number of IRQs and ENDs supported by HW. Will be tuned by
2389 * The XiveSource and Xive2EndSource objects are realized with the in pnv_xive2_realize()
/qemu/tests/tcg/hexagon/
H A Dreg_mut.c5 * This program is free software; you can redistribute it and/or modify
H A Doverflow.c4 * This program is free software; you can redistribute it and/or modify
/qemu/target/mips/
H A Dgdbstub.c7 * This library is free software; you can redistribute it and/or
/qemu/scripts/
H A Danalyze-inclusions15 # 2) otherwise, it will configure and builds QEMU itself in a
/qemu/bsd-user/riscv/
H A Dtarget_arch_reg.h6 * This program is free software; you can redistribute it and/or modify
/qemu/include/qobject/
H A Dqobject.h132 * Return @obj, but only if @obj is not NULL and @type is equal to
/qemu/include/hw/xen/interface/arch-x86/
H A Dcpuid.h90 * IO-APIC RTE and bits 11:5 from the MSI address can be used to store
/qemu/target/i386/hvf/
H A Dx86_cpuid.c7 * This program is free software; you can redistribute it and/or
/qemu/target/i386/tcg/
H A Dmpx_helper.c6 * This library is free software; you can redistribute it and/or
/qemu/target/hexagon/
H A Dgdbstub.c4 * This program is free software; you can redistribute it and/or modify
/qemu/include/hw/uefi/
H A Dvar-service-edk2.h4 * uefi-vars device - structs and defines from edk2
/qemu/target/arm/tcg/
H A Dsme-fa64.decode5 # This library is free software; you can redistribute it and/or
/qemu/tests/bench/
H A Datomic64-bench.c44 * This is faster than rand_r(), and gives us a wider range (RAND_MAX is only

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