Home
last modified time | relevance | path

Searched full:always (Results 1 – 25 of 931) sorted by relevance

12345678910>>...38

/qemu/tests/qemu-iotests/
H A D257263 - always: This is a "best effort" style mode.
264 Bitmaps are always synchronized, regardless of failure.
375 (bsync_mode == 'always')):
386 if bsync_mode == 'always' and failure == 'intermediate':
433 if not failure or bsync_mode == 'always':
434 # Always keep the last backup on success or when using 'always'
481 None: ['on-success', 'always', 'never', None],
482 'bitmap404': ['on-success', 'always', 'never', None],
483 'bitmap0': ['always', 'never']
486 None: ['on-success', 'always', 'never', None],
[all …]
H A D12668 # (2) vmdk only supports vmdk backing files, so it always reports the
97 # in a sense always absolute paths, so such paths will never be combined with
99 # relative path, it will always be evaluated relative to qemu's CWD (but not
103 # This may always give you weird results because in one sense, qemu considers
/qemu/rust/bits/src/
H A Dlib.rs113 #[inline(always)]
119 #[inline(always)]
125 #[inline(always)]
131 #[inline(always)]
137 #[inline(always)]
143 #[inline(always)]
149 #[inline(always)]
155 #[inline(always)]
161 #[inline(always)]
167 #[inline(always)]
[all …]
/qemu/ui/icons/
H A Dqemu.svg236 inkscape:collect="always"
267 inkscape:collect="always"
278 inkscape:collect="always"
298 inkscape:collect="always"
320 inkscape:collect="always"
340 inkscape:collect="always"
362 inkscape:collect="always"
371 inkscape:collect="always"
391 inkscape:collect="always"
413 inkscape:collect="always"
[all …]
/qemu/pc-bios/
H A Dqemu_logo.svg238 inkscape:collect="always"
269 inkscape:collect="always"
280 inkscape:collect="always"
300 inkscape:collect="always"
322 inkscape:collect="always"
342 inkscape:collect="always"
364 inkscape:collect="always"
373 inkscape:collect="always"
393 inkscape:collect="always"
415 inkscape:collect="always"
[all …]
/qemu/linux-user/aarch64/
H A Dmeson.build2 # is always true as far as source_set.apply() is concerned. Always build
/qemu/.gitlab-ci.d/
H A Dcontainer-template.yml9 # Always ':latest' because we always use upstream as a common cache source
H A Dbuildtest-template.yml9 when: always
88 when: always
104 when: always
/qemu/docs/interop/
H A Dpr-helper.rst39 Right now no feature is defined, so the two parties always write four
77 The sense data is always sent to keep the protocol simple, even though
80 The payload size is always less than or equal to the allocation length
/qemu/bsd-user/
H A Dsignal-common.h24 * it will always return non-zero. (Think of it like a mutex that can't
59 * For FreeBSD, we have si_pid, si_uid, si_status, and si_addr always. Linux and
61 * but whose siginfo has fewer fields always).
/qemu/target/riscv/
H A Dcpu_cfg_fields.h.inc124 * Always 'true' booleans for named features
125 * TCG always implement/can't be user disabled,
132 /* Always enabled for TCG if has_priv_1_11 */
H A Ddebug.c217 qemu_log_mask(LOG_UNIMP, "%s bit is always zero\n", msg); in warn_always_zero_bit()
232 /* Validate unimplemented (always zero) bits */ in textra_validate()
244 /* Validate unimplemented (always zero) bits */ in textra_validate()
448 /* validate unimplemented (always zero) bits */ in type2_mcontrol_validate()
576 /* validate unimplemented (always zero) bits */ in type6_mcontrol6_validate()
806 /* validate unimplemented (always zero) bits */ in itrigger_validate()
1067 * maskmax = 0 (unimplemented, always 0) in riscv_trigger_reset_hold()
1069 * hit = 0 (unimplemented, always 0) in riscv_trigger_reset_hold()
1070 * select = 0 (always 0, perform match on address) in riscv_trigger_reset_hold()
1071 * timing = 0 (always 0, trigger before instruction) in riscv_trigger_reset_hold()
[all …]
/qemu/accel/tcg/
H A Dtb-jmp-cache.h21 * no need for qatomic_rcu_read() and pc is always consistent with a
23 * CF_PCREL, but it's used always for simplicity.
/qemu/linux-user/arm/
H A Dmeson.build10 # is always true as far as source_set.apply() is concerned. Always build
/qemu/tests/qemu-iotests/tests/
H A Dmirror-top-perms75 and then completing the job, because the mirror job always
93 # (And we need share-rw=on because mirror-top was always
115 # example always unshare the WRITE permission. The raw driver
H A Dfuse-allow-other106 # Should always work
111 # Should always work
127 # exports always have o-r), but test it anyway
/qemu/hw/intc/
H A Darm_gicv3_dist.c309 /* This GIC implementation always has affinity routing enabled, in gicd_readb()
329 /* This GIC implementation always has affinity routing enabled, in gicd_writeb()
391 * Since for QEMU affinity routing is always enabled in gicd_readl()
393 * both always 1, and we can simply make the NS view in gicd_readl()
416 * CPUNumber == 0 since for us ARE is always 1 in gicd_readl()
422 * "security extensions not supported" always implies DS == 1, in gicd_readl()
500 /* RAZ/WI since affinity routing is always enabled */ in gicd_readl()
568 /* RAZ/WI since affinity routing is always enabled */ in gicd_readl()
619 * ARE is RAO/WI (affinity routing always on), and only in gicd_writel()
626 * ARE_NS and ARE_S are RAO/WI (affinity routing always on) in gicd_writel()
[all …]
H A Darm_gicv3_kvm.c139 /* For the KVM GICv3, affinity routing is always enabled, and the first 8 in kvm_dist_get_priority()
140 * GICD_IPRIORITYR<n> registers are always RAZ/WI. The corresponding in kvm_dist_get_priority()
160 /* For the KVM GICv3, affinity routing is always enabled, and the first 8 in kvm_dist_put_priority()
161 * GICD_IPRIORITYR<n> registers are always RAZ/WI. The corresponding in kvm_dist_put_priority()
182 /* For the KVM GICv3, affinity routing is always enabled, and the first 2 in kvm_dist_get_edge_trigger()
183 * GICD_ICFGR<n> registers are always RAZ/WI. The corresponding in kvm_dist_get_edge_trigger()
207 /* For the KVM GICv3, affinity routing is always enabled, and the first 2 in kvm_dist_put_edge_trigger()
208 * GICD_ICFGR<n> registers are always RAZ/WI. The corresponding in kvm_dist_put_edge_trigger()
256 /* For the KVM GICv3, affinity routing is always enabled, and the in kvm_dist_getbmp()
258 * GICD_ISACTIVER0 registers are always RAZ/WI. The corresponding in kvm_dist_getbmp()
[all …]
/qemu/docs/system/arm/
H A Dmps2.rst43 block RAM is unimplemented (QEMU always maps this to ZBT SSRAM1, as
44 if zbt_boot_ctrl is always zero)
46 unimplemented (QEMU always maps this to BRAM, ignoring the
/qemu/docs/system/devices/
H A Dvirtio-snd.rst25 …configuration is supported: the first one will always be a playback stream, an optional second wil…
H A Divshmem-flat.rst22 (interrupt) the peers. Therefore, to use this device, it is always necessary to
29 the IRQ mechanism is disabled). The shared memory region is always present.
/qemu/target/xtensa/core-de233_fpu/
H A Dcore-matmap.h222 #define XCHAL_ITLB_SET0_ENTRIES 4 /* number of entries in this way (always a power of 2) */
243 #define XCHAL_ITLB_SET1_ENTRIES 4 /* number of entries in this way (always a power of 2) */
264 #define XCHAL_ITLB_SET2_ENTRIES 4 /* number of entries in this way (always a power of 2) */
285 #define XCHAL_ITLB_SET3_ENTRIES 4 /* number of entries in this way (always a power of 2) */
306 #define XCHAL_ITLB_SET4_ENTRIES 4 /* number of entries in this way (always a power of 2) */
327 #define XCHAL_ITLB_SET5_ENTRIES 4 /* number of entries in this way (always a power of 2) */
363 #define XCHAL_ITLB_SET6_ENTRIES 8 /* number of entries in this way (always a power of 2) */
454 #define XCHAL_DTLB_SET0_ENTRIES 4 /* number of entries in this way (always a power of 2) */
475 #define XCHAL_DTLB_SET1_ENTRIES 4 /* number of entries in this way (always a power of 2) */
496 #define XCHAL_DTLB_SET2_ENTRIES 4 /* number of entries in this way (always a power of 2) */
[all …]
/qemu/tcg/i386/
H A Dtcg-target.h48 /* 64-bit registers; always define the symbols to avoid
68 /* 64-bit registers; likewise always define. */
/qemu/rust/qemu-api/src/
H A Dqom.rs131 // SAFETY: it is always safe to cast to your own type
189 #[inline(always)]
196 #[inline(always)]
203 #[inline(always)]
287 /// Return the receiver as an Object. This is always safe, even
304 /// This cast is always safe, but because the result is mutable
346 // SAFETY: upcasting to ObjectClass is always valid, and the in cast()
404 /// This is always safe; the [`IsA`] trait provides static verification
435 // SAFETY: upcasting to Object is always valid, and the in dynamic_cast()
453 /// `unsafe_cast::<Object>()` is always safe.
[all …]
/qemu/include/hw/ppc/
H A Dmac_dbdma.h132 #define INTR_ALWAYS 0x0030 /* always interrupt */
140 #define BR_ALWAYS 0x000c /* always branch */
148 #define WAIT_ALWAYS 0x0003 /* always wait */

12345678910>>...38