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/linux/arch/x86/include/asm/
H A Dsmap.h14 #include <asm/alternative.h>
19 ALTERNATIVE "", "clac", X86_FEATURE_SMAP
22 ALTERNATIVE "", "stac", X86_FEATURE_SMAP
37 * Note: a barrier is implicit in alternative().
42 alternative("", "clac", X86_FEATURE_SMAP); in clac()
47 alternative("", "stac", X86_FEATURE_SMAP); in stac()
62 * Note: a barrier is implicit in alternative().
67 alternative("", "clac", X86_FEATURE_LASS); in lass_clac()
72 alternative("", "stac", X86_FEATURE_LASS); in lass_stac()
80 ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "\n\t" in smap_save()
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H A Dalternative.h24 * Alternative inline assembly for SMP.
34 * The SMP alternative tables can be kept after boot and contain both
93 * Debug flag that can be tested to see whether alternative
216 /* alternative assembly primitive: */
217 #define ALTERNATIVE(oldinstr, newinstr, ft_flags) \ macro
223 ALTERNATIVE(ALTERNATIVE(oldinstr, newinstr1, ft_flags1), newinstr2, ft_flags2)
231 ALTERNATIVE(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2), \
235 * Alternative instructions for different CPU types or capabilities.
246 #define alternative(oldinstr, newinstr, ft_flags) \ macro
247 asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) : : : "memory")
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H A Dbarrier.h5 #include <asm/alternative.h>
15 #define mb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "mfence", \
17 #define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \
19 #define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence", \
48 #define barrier_nospec() alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC)
H A Duaccess_64.h11 #include <asm/alternative.h>
29 asm_inline (ALTERNATIVE("", "and " __percpu_arg([mask]) ", %[addr]", in __untagged_addr()
60 * Masking the user address is an alternative to a conditional
128 ALTERNATIVE("rep movsb", in copy_user_generic()
190 ALTERNATIVE("rep stosb", in __clear_user()
H A Dnospec-branch.h10 #include <asm/alternative.h>
299 ALTERNATIVE "", \
324 * VERW within an ALTERNATIVE.
330 ALTERNATIVE "", __CLEAR_CPU_BUFFERS, X86_FEATURE_CLEAR_CPU_BUF
334 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP
338 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_VMEXIT
403 ALTERNATIVE("", \
528 asm volatile(ALTERNATIVE("", "wrmsr", %c[feature]) in alternative_msr_write()
540 asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB) in indirect_branch_prediction_barrier()
/linux/arch/s390/include/asm/
H A Dalternative.h6 * Each alternative comes with a 32 bit feature field:
17 * in which context an alternative is supposed to be applied to the
24 * specific alternative patching.
27 * alternative should be applied.
67 u32 type : 8; /* type of alternative */
97 * | alternative instr 1 |
100 * | alternative instr 2 |
106 * | alternative instr |
130 /* alternative assembly primitive: */
131 #define ALTERNATIVE(oldinstr, altinstr, feature) \ macro
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/linux/tools/testing/selftests/net/
H A Daltnames.sh21 check_err $? "Failed to add short alternative name"
24 check_err $? "Failed to do link show with short alternative name"
27 check_err $? "Failed to get short alternative name from link show JSON"
30 check_err $? "Got unexpected short alternative name from link show JSON"
36 check_err $? "Failed to add long alternative name"
39 check_err $? "Failed to do link show with long alternative name"
42 check_err $? "Failed to get long alternative name from link show JSON"
45 check_err $? "Got unexpected long alternative name from link show JSON"
48 check_err $? "Failed to delete short alternative name"
51 check_fail $? "Unexpected success while trying to do link show with deleted short alternative name"
/linux/tools/objtool/
H A Ddisas.c40 * Maximum number of instructions per alternative
45 * Information to disassemble an alternative
49 struct alternative *alt; /* alternative or NULL if default code */
50 char *name; /* name for this alternative */
56 } insn[DISAS_ALT_INSN_MAX]; /* alternative instructions */
192 * Check if we are processing an alternative at the original in disas_print_addr_alt()
194 * we are referencing an address inside the alternative. in disas_print_addr_alt()
197 * alternative. In that case, the address should be updated in disas_print_addr_alt()
521 * Alternative can insert a fake nop, sometimes with no in disas_print_insn()
556 * alternative (i.e. insn->alt_group != NULL), and it is disassembled
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/linux/arch/arm64/include/asm/
H A Dalternative-macros.h41 * alternative assembly primitive:
117 * Alternative sequences
131 * alternative sequence it is defined in (branches into an
132 * alternative sequence are not fixed up).
136 * Begin an alternative code sequence.
165 * Provide the other half of the alternative code sequence.
178 * Complete an alternative code sequence.
190 * Callback-based alternative epilogue
197 * Provides a trivial alternative or default sequence consisting solely
213 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));
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H A Dlse.h12 #include <asm/alternative.h>
13 #include <asm/alternative-macros.h>
26 ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
/linux/arch/parisc/include/asm/
H A Dcache.h9 #include <asm/alternative.h>
53 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
56 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
57 ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \
61 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
62 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) \
65 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
66 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
/linux/arch/riscv/include/asm/
H A Derrata_list.h18 ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault), \
24 ALTERNATIVE(__stringify(RISCV_PTR do_page_fault), \
31 asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID, \
36 asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \
41 asm(ALTERNATIVE("sfence.vma %0, %1", "sfence.vma", SIFIVE_VENDOR_ID, \
46 asm(ALTERNATIVE( \
81 asm volatile(ALTERNATIVE( \
102 asm volatile(ALTERNATIVE( \
H A Dalternative-macros.h19 .pushsection .alternative, "a"
70 ".pushsection .alternative, \"a\"\n" \
135 * ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k)
137 * asm(ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k));
146 #define ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) \ macro
151 * ALTERNATIVE() to patch its customized content at the same location. In
153 * on the following sample code and then replace ALTERNATIVE() with
/linux/Documentation/devicetree/bindings/net/pse-pd/
H A Dskyworks,si3474.yaml113 pairset-names = "alternative-a", "alternative-b";
121 pairset-names = "alternative-a", "alternative-b";
129 pairset-names = "alternative-a", "alternative-b";
137 pairset-names = "alternative-a", "alternative-b";
H A Dpse-controller.yaml75 - alternative-a
76 - alternative-b
86 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
/linux/arch/loongarch/include/asm/
H A Dalternative.h21 * Debug flag that can be tested to see whether alternative
50 * Pad the second replacement alternative with additional NOPs if it is
51 * additionally longer than the first replacement alternative.
70 /* alternative assembly primitive: */
71 #define ALTERNATIVE(oldinstr, newinstr, feature) \ macro
92 * Alternative instructions for different CPU types or capabilities.
103 #define alternative(oldinstr, newinstr, feature) \ macro
104 (asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory"))
/linux/Documentation/networking/pse-pd/
H A Dpse-pi.rst32 design. As a result, the complexities of choosing between alternative pin
42 as Alternative A and Alternative B, which are distinguished not only by their
46 Alternative A and B Overview
49 - **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
51 The power delivery's polarity in this alternative can vary based on the MDI
55 - **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
58 1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
65 The following table outlines the pin configurations for both Alternative A and
66 Alternative B.
69 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
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/linux/arch/s390/boot/
H A Dalternative.c7 #include "../kernel/alternative.c"
91 * Use debug-alternative command line parameter for debugging:
92 * "debug-alternative"
93 * -> print debug message for every single alternative
95 * "debug-alternative=0;2"
98 * "debug-alternative=0:0-7"
103 * "debug-alternative=0:!8;1"
/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Devent_alternatives_tests_p9.c34 * alternative events is handled by respective PMU driver in event_alternatives_tests_p9()
50 * Expected to pass since PM_RUN_CYC_ALT in PMC2 has alternative event in event_alternatives_tests_p9()
63 * Expected to pass since PM_INST_DISP in PMC2 has alternative event in event_alternatives_tests_p9()
76 * Expected to pass since PM_BR_2PATH in PMC2 has alternative event in event_alternatives_tests_p9()
89 * Expected to pass since PM_LD_MISS_L1 in PMC3 has alternative event in event_alternatives_tests_p9()
102 * Expected to pass since PM_RUN_INST_CMPL_ALT in PMC4 has alternative event in event_alternatives_tests_p9()
H A Devent_alternatives_tests_p10.c36 * alternative events is handled by respective PMU driver in event_alternatives_tests_p10()
45 * Test for event alternative for 0x0001e in event_alternatives_tests_p10()
66 * Expected to pass since 0x0001e has alternative event in event_alternatives_tests_p10()
94 * Expected to pass since 0x00020 has alternative event in event_alternatives_tests_p10()
/linux/arch/x86/entry/
H A Dcalling.h168 ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID
174 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
187 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
217 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
223 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
231 ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI
250 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
260 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
307 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
336 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
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/linux/arch/x86/um/asm/
H A Dbarrier.h6 #include <asm/alternative.h>
15 #define mb() alternative("lock addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
16 #define rmb() alternative("lock addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
17 #define wmb() alternative("lock addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
/linux/tools/objtool/include/objtool/
H A Dcheck.h34 * This is shared with the other alt_groups in the same alternative.
48 struct alternative { struct
49 struct alternative *next; argument
96 struct alternative *alts;
H A Dtrace.h110 void trace_alt_begin(struct instruction *orig_insn, struct alternative *alt,
112 void trace_alt_end(struct instruction *orig_insn, struct alternative *alt,
133 struct alternative *alt, in trace_alt_begin()
136 struct alternative *alt, in trace_alt_end()
/linux/arch/parisc/kernel/
H A Dpacache.S26 #include <asm/alternative.h>
106 ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
244 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP)
305 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
548 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
549 ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
677 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
743 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
775 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
792 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
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