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Searched full:rx_clk (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-s32.c38 struct clk *rx_clk; member
68 ret = clk_prepare_enable(gmac->rx_clk); in s32_gmac_init()
73 ret = clk_set_rate(gmac->rx_clk, GMAC_INTF_RATE_125M); in s32_gmac_init()
89 clk_disable_unprepare(gmac->rx_clk); in s32_gmac_init()
100 clk_disable_unprepare(gmac->rx_clk); in s32_gmac_exit()
140 gmac->rx_clk = devm_clk_get(&pdev->dev, "rx"); in s32_dwmac_probe()
141 if (IS_ERR(gmac->rx_clk)) in s32_dwmac_probe()
142 return dev_err_probe(dev, PTR_ERR(gmac->rx_clk), in s32_dwmac_probe()
/linux/Documentation/devicetree/bindings/net/
H A Dqcom-emac.txt44 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
93 "mdio_clk", "tx_clk", "rx_clk", "sys_clk";
H A Dcdns,macb.yaml89 - enum: [ rx_clk, tsu_clk ]
223 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
H A Dqca,ar803x.yaml76 cable is disconnected. And the RX_CLK always keeps outputting a
H A Dmotorcomm,yt8xxx.yaml57 drive strength of rx_clk rgmii pad.
/linux/drivers/dma/xilinx/
H A Dxilinx_dma.c481 struct clk **rx_clk, struct clk **rxs_clk);
499 * @rx_clk: DMA s2mm clock
518 struct clk *rx_clk; member
2625 struct clk **tx_clk, struct clk **rx_clk, in axidma_clk_init() argument
2640 *rx_clk = devm_clk_get(&pdev->dev, "m_axi_s2mm_aclk"); in axidma_clk_init()
2641 if (IS_ERR(*rx_clk)) in axidma_clk_init()
2642 *rx_clk = NULL; in axidma_clk_init()
2660 err = clk_prepare_enable(*rx_clk); in axidma_clk_init()
2662 dev_err(&pdev->dev, "failed to enable rx_clk (%d)\n", err); in axidma_clk_init()
2675 clk_disable_unprepare(*rx_clk); in axidma_clk_init()
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Dpincfg.txt52 0 0 2 0 1 0 /* RX_CLK */
/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8568mds.dts148 0x4 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */
176 0x5 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */
/linux/arch/powerpc/boot/dts/
H A Dmpc832x_rdb.dts179 3 21 2 0 1 0 /* RX_CLK (CLK16) */
199 0 13 2 0 1 0 /* RX_CLK (CLK9) */
H A Dkmeter1.dts163 0 0 2 0 1 0 /* RX_CLK */
189 0 31 2 0 1 0 /* RX_CLK */
/linux/drivers/net/dsa/sja1105/
H A Dsja1105_clocking.c449 pad_mii_rx.clk_os = 2; /* RX_CLK/RXC output stage: */ in sja1105_cfg_pad_rx_config()
451 pad_mii_rx.clk_ih = 0; /* RX_CLK/RXC input hysteresis: */ in sja1105_cfg_pad_rx_config()
453 pad_mii_rx.clk_ipud = 2; /* RX_CLK/RXC input pull-up/down: */ in sja1105_cfg_pad_rx_config()
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi844 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
858 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
872 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
886 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
H A Dversal-net.dtsi442 clock-names = "pclk", "hclk", "tx_clk", "rx_clk",
451 clock-names = "pclk", "hclk", "tx_clk", "rx_clk",
/linux/drivers/net/phy/
H A Dmxl-86110.c570 * the default additional delay value on RX_CLK in mxl86110_config_init()
H A Dicplus.c35 #define IP1001_RXPHASE_SEL BIT(0) /* Add delay on RX_CLK */
/linux/drivers/net/ethernet/cadence/
H A Dmacb.h1196 struct clk **rx_clk, struct clk **tsu_clk);
1277 struct clk *rx_clk; member
/linux/drivers/net/ethernet/qualcomm/emac/
H A Demac.c69 "rx_clk", "sys_clk"
/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a7740.c1917 /* RXD[0:3], RX_CLK, RX_DV, RX_ER
1933 /* RXD[0:7], RX_CLK, RX_DV, RX_ER
/linux/drivers/net/phy/mscc/
H A Dmscc_main.c539 /* For traffic to pass, the VSC8502 family needs the RX_CLK disable bit in vsc85xx_update_rgmii_cntl()