Searched full:mx5 (Results 1 – 11 of 11) sorted by relevance
| /src/sys/contrib/device-tree/Bindings/clock/ |
| H A D | imx5-clock.yaml | 7 title: Freescale i.MX5 Clock Controller 15 for the full list of i.MX5 clock IDs.
|
| /src/sys/contrib/device-tree/Bindings/reset/ |
| H A D | fsl,imx-src.yaml | 14 IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device 20 The following RESET_INDEX values are valid for i.MX5:
|
| H A D | fsl,imx-src.txt | 28 IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device 43 The following RESET_INDEX values are valid for i.MX5:
|
| /src/share/man/man4/man4.arm/ |
| H A D | imx_wdog.4 | 31 .Nd device driver for the NXP i.MX5 and i.MX6 watchdog timer 51 support for the watchdog timer present on NXP i.MX5 and i.MX6 processors.
|
| /src/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | fsl,imx6q-ldb.yaml | 112 On i.MX5, the internal two-input-multiplexer is used. Due to hardware 117 A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected
|
| H A D | ldb.txt | 55 On i.MX5, the internal two-input-multiplexer is used. Due to hardware 60 A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected
|
| /src/sys/dev/sdhci/ |
| H A D | fsl_sdhci.c | 582 * The i.MX5 ESDHC hardware requires the driver to manually in fsl_sdhc_set_clock()
|
| /src/sys/dev/usb/ |
| H A D | usbdevs | 2116 product FTDI MX4_5 0xfa02 Matrix Orbital MX4 or MX5
|
| /src/share/misc/ |
| H A D | usb_vendors | 975 fa02 Matrix Orbital MX4 or MX5
|
| H A D | pci_vendors | 26237 1001 Mx5 PMC/XMC Databus Interface Card
|
| /src/tests/sys/geom/class/eli/ |
| H A D | testvect.h | 91 …300\241@?#\232\225\263\037\007", 1000, "\201\355F\216\035\037@\350_\232\325Mx5\353\004*\372\250\37…
|