Replace calls to bus_generic_attach with bus_attach_children

Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D47675

Replace calls to bus_generic_probe with bus_identify_children

Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D47674

sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

sdhci: Remove unused devclass arguments to DRIVER_MODULE.

sdhci: clean up empty lines in .c and .h files

o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
specific transfer method instead. While at it, factor

o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
specific transfer method instead. While at it, factor out allocation
and freeing of SDMA resources to sdhci_dma_{alloc,free}() in order to
keep the code more readable when adding support for ADMA variants.

o Base the size of the SDMA bounce buffer on MAXPHYS up to the maximum
of 512 KiB instead of using a fixed 4-KiB-buffer. With the default
MAXPHYS of 128 KiB and depending on the controller and medium, this
reduces the number of SDHCI interrupts by a factor of ~16 to ~32 on
sequential reads while an increase of throughput of up to ~84 % was
seen.

Front-ends for broken controllers that only support an SDMA buffer
boundary of a specific size may set SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY
and supply a size via struct sdhci_slot. According to Linux, only
Qualcomm MSM-type SDHCI controllers are affected by this, though.

Requested by: Shreyank Amartya (unconditional bump to 512 KiB)

o Introduce a SDHCI_DEPEND macro for specifying the dependency of the
front-end modules on the sdhci(4) one and bump the module version
of sdhci(4) to 2 via an also newly introduced SDHCI_VERSION in order
to ensure that all components are in sync WRT struct sdhci_slot.

o In sdhci(4):
- Make pointers const were applicable,
- replace a few device_printf(9) calls with slot_printf() for
consistency, and
- sync some local functions with their prototypes WRT static.

show more ...

Replace calls to bus_generic_attach with bus_attach_children

Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D47675

Replace calls to bus_generic_probe with bus_identify_children

Reviewed by: imp
Differential Revision: https://reviews.freebsd.org/D47674

sys: Remove $FreeBSD$: one-line .c pattern

Remove /^[\s*]*__FBSDID\("\$FreeBSD\$"\);?\s*\n/

sdhci: Remove unused devclass arguments to DRIVER_MODULE.

sdhci: clean up empty lines in .c and .h files

o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
specific transfer method instead. While at it, factor

o Don't allocate resources for SDMA in sdhci(4) if the controller or the
front-end doesn't support SDMA or the latter implements a platform-
specific transfer method instead. While at it, factor out allocation
and freeing of SDMA resources to sdhci_dma_{alloc,free}() in order to
keep the code more readable when adding support for ADMA variants.

o Base the size of the SDMA bounce buffer on MAXPHYS up to the maximum
of 512 KiB instead of using a fixed 4-KiB-buffer. With the default
MAXPHYS of 128 KiB and depending on the controller and medium, this
reduces the number of SDHCI interrupts by a factor of ~16 to ~32 on
sequential reads while an increase of throughput of up to ~84 % was
seen.

Front-ends for broken controllers that only support an SDMA buffer
boundary of a specific size may set SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY
and supply a size via struct sdhci_slot. According to Linux, only
Qualcomm MSM-type SDHCI controllers are affected by this, though.

Requested by: Shreyank Amartya (unconditional bump to 512 KiB)

o Introduce a SDHCI_DEPEND macro for specifying the dependency of the
front-end modules on the sdhci(4) one and bump the module version
of sdhci(4) to 2 via an also newly introduced SDHCI_VERSION in order
to ensure that all components are in sync WRT struct sdhci_slot.

o In sdhci(4):
- Make pointers const were applicable,
- replace a few device_printf(9) calls with slot_printf() for
consistency, and
- sync some local functions with their prototypes WRT static.

show more ...

Don't call sdhci_cleanup_slot() if sdhci_init_slot() never got called.
Also, do callout_init() very early in attach, so that callout_drain()
can be called in detach without worrying about whether it

Don't call sdhci_cleanup_slot() if sdhci_init_slot() never got called.
Also, do callout_init() very early in attach, so that callout_drain()
can be called in detach without worrying about whether it ever got init'd.

show more ...

Actually release resources in detach() rather than just returning EBUSY.
This will enable use of 'devctl disable', allow creation of a module, etc.

Rename sdhci_cam_start_slot() into sdhci_start_slot()

This change allows to just call sdhci_start_slot() in SDHCI drivers
and not to think about which stack handles the operation.

As a side effect,

Rename sdhci_cam_start_slot() into sdhci_start_slot()

This change allows to just call sdhci_start_slot() in SDHCI drivers
and not to think about which stack handles the operation.

As a side effect, this will also fix MMCCAM with sdhci_acpi driver.

Approved by: imp (mentor)
Differential Revision: https://reviews.freebsd.org/D12471

show more ...

An MMC/SD/SDIO stack using CAM

Implement the MMC/SD/SDIO protocol within a CAM framework. CAM's
flexible queueing will make it easier to write non-storage drivers
than the legacy stack. SDIO drivers

An MMC/SD/SDIO stack using CAM

Implement the MMC/SD/SDIO protocol within a CAM framework. CAM's
flexible queueing will make it easier to write non-storage drivers
than the legacy stack. SDIO drivers from both the kernel and as
userland daemons are possible, though much of that functionality will
come later.

Some of the CAM integration isn't complete (there are sleeps in the
device probe state machine, for example), but those minor issues can
be improved in-tree more easily than out of tree and shouldn't gate
progress on other fronts. Appologies to reviews if specific items
have been overlooked.

Submitted by: Ilya Bakulin
Reviewed by: emaste, imp, mav, adrian, ian
Differential Review: https://reviews.freebsd.org/D4761

merge with first commit, various compile hacks.

show more ...

Use the newly added mpc85xx_get_system_clock()

Simplify the platform clock acquisition by using the new helper function.

Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4); this allows for
incrementing the mmc(4) module version but also for entire omis

Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4); this allows for
incrementing the mmc(4) module version but also for entire omission
of these bridge declarations for mmccam(4) in a single place, i. e.
in dev/mmc/bridge.h.

show more ...

o Another round fixes for mmc(4), mmcsd(4) and sdhci(4) regarding
comments, marking unused parameters as such, style(9), whitespace,
etc.
o In the mmc(4) bridges and sdhci(4) (bus) front-ends:

o Another round fixes for mmc(4), mmcsd(4) and sdhci(4) regarding
comments, marking unused parameters as such, style(9), whitespace,
etc.
o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
- Remove redundant assignments of the default bus_generic_print_child
device method (I've whipped these out of the tree as part of r227843
once, but they keep coming back ...),
- use DEVMETHOD_END,
- use NULL instead of 0 for pointers.
o Trim/adjust includes.

show more ...

Use the new sdhci_fdt_gpio helper functions to add full support for FDT
gpio pins for detecting card insert/remove and write protect.

Since it's no longer accessing a powerpc-specific register, drop the #ifdef.

Fix the build. protctl is only used on powerpc.

While here, remove the need to check the SVR SPR, as others may be compatible
with the p1022-esdhc type.

Merge i.MX and PowerPC SDHCI drivers

Summary:
i.MX5 and PowerPC use a very similar eSDHC controller, which is also
similar to the uSDHC controller used by i.MX6. The imx_sdhci driver works
almost c

Merge i.MX and PowerPC SDHCI drivers

Summary:
i.MX5 and PowerPC use a very similar eSDHC controller, which is also
similar to the uSDHC controller used by i.MX6. The imx_sdhci driver works
almost completely with PowerPC, with some minor tweaks.

There is one caveat with this: reset currently does not work on PowerPC, so has
been #ifdef'd out until this can be tracked down and fixed. If resets are done
the controller will timeout all data transactions. Without a reset, it appears
to work just fine.

This is part 3, following up r308186 and r308187.

Test Plan:
This has been tested on a PowerPC QorIQ P1022 board. It has not been
tested on i.MX, but no regressions are expected.

Reviewed By: imp
Differential Revision: https://reviews.freebsd.org/D8407

show more ...

Move imx_sdhci driver over to a dev/sdhci in preparation for QorIQ support.

Freescale uses eSDHC in both i.MX (ARM) and QorIQ (PowerPC), with slight
differences. This is part one in unifying the dr

Move imx_sdhci driver over to a dev/sdhci in preparation for QorIQ support.

Freescale uses eSDHC in both i.MX (ARM) and QorIQ (PowerPC), with slight
differences. This is part one in unifying the drivers.

Reviewed by: imp

show more ...

Another round of changes to add compatibility with the older ESHDC variety
of hardware. Mostly this focuses on the big changes needed for setting the
bus clock, because ESDHC is SDHCI v2.0 and USDHC

Another round of changes to add compatibility with the older ESHDC variety
of hardware. Mostly this focuses on the big changes needed for setting the
bus clock, because ESDHC is SDHCI v2.0 and USDHC is 3.0, and the number,
location, and interpretation of clock divisor bits is vastly different
between the two. This doesn't get the device all the way to functioning
on ESDHC hardware yet, but it's much closer, now getting through all the
card detection and negotiation of capabilties and speed (but it eventually
hangs on what appears to be a missing interrupt).

Another missing chunk of code for handling ESDHC's 32 bit command-and-mode
register using sdhci's pair of 16 bit writes is added.

This also does some leading whitespace cleanups and sorts some softc
struct members by size, and adds some comments (because when do I ever
touch code without adding comments?).

show more ...