/qemu/tests/tcg/mips/user/ase/msa/ |
H A D | test_msa_compile_64r6el.sh | 6 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_b.c \ 8 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_h.c \ 10 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_w.c \ 12 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_d.c \ 14 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_b.c \ 16 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_h.c \ 18 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_w.c \ 20 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_d.c \ 22 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_b.c \ 24 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_h.c \ [all …]
|
H A D | test_msa_compile_64r6eb.sh | 6 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_b.c \ 8 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_h.c \ 10 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_w.c \ 12 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_d.c \ 14 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_b.c \ 16 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_h.c \ 18 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_w.c \ 20 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_d.c \ 22 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_b.c \ 24 /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_h.c \ [all …]
|
H A D | test_msa_compile_32r5eb.sh | 6 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_b.c \ 9 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_h.c \ 12 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_w.c \ 15 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_d.c \ 18 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_b.c \ 21 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_h.c \ 24 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_w.c \ 27 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_d.c \ 30 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_pcnt_b.c \ 33 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_pcnt_h.c \ [all …]
|
H A D | test_msa_compile_32r5el.sh | 6 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_b.c \ 9 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_h.c \ 12 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_w.c \ 15 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nloc_d.c \ 18 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_b.c \ 21 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_h.c \ 24 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_w.c \ 27 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_nlzc_d.c \ 30 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_pcnt_b.c \ 33 /opt/mti/bin/mips-mti-linux-gnu-gcc bit-count/test_msa_pcnt_h.c \ [all …]
|
H A D | README | 2 mips64el MSA-enabled CPU (I6400, I6500), using an appropriate MIPS toolchain. 5 /opt/img/bin/mips-img-linux-gnu-gcc <source file> \ 17 cd tests/tcg/mips/user/ase/msa
|
/qemu/docs/system/ |
H A D | target-mips.rst | 3 MIPS System emulator 6 Four executables cover simulation of 32 and 64-bit MIPS systems in both 7 endian options, ``qemu-system-mips``, ``qemu-system-mipsel`` 11 - The MIPS Malta prototype board \"malta\" 15 - MIPS emulator pseudo board \"mipssim\" 17 - A MIPS Magnum R4000 machine \"magnum\". This machine needs the 22 - Core board with MIPS 24Kf CPU and Galileo system controller 43 - MIPS R4000 CPU 51 The MIPS Magnum R4000 emulation supports: 53 - MIPS R4000 CPU [all …]
|
H A D | cpu-models-mips.rst.inc | 1 Supported CPU model configurations on MIPS hosts 4 QEMU supports variety of MIPS CPU models: 79 MIPS64 Processor (MIPS III, 1991) 93 MIPS I7200 (nanoMIPS, 2018) 95 Preferred CPU models for MIPS hosts 98 The following CPU models are preferred for use on different MIPS hosts: 100 ``MIPS III``
|
/qemu/contrib/gitdm/ |
H A D | group-map-wavecomp | 2 # Wave Computing acquired MIPS in June 2018. Also, from February 2013 3 # to October 2017, MIPS was owned by Imagination Technologies. 7 aleksandar.markovic@mips.com 12 chris@mips.com 14 ericj@mips.com 16 james.cowgill@mips.com 18 james.hogan@mips.com 21 matthew.fortune@mips.com 26 petarj@mips.com 30 yongbok.kim@mips.com
|
/qemu/target/mips/ |
H A D | mips-defs.h | 12 * bits 0-23: MIPS base instruction sets 26 * bits 24-39: MIPS ASEs 49 /* MIPS eXtension/enhanced Unit defined by Ingenic */ 56 /* MIPS CPU defines. */ 65 /* MIPS Technologies "Release 1" */ 69 /* MIPS Technologies "Release 2" */ 73 /* MIPS Technologies "Release 3" */ 77 /* MIPS Technologies "Release 5" */ 81 /* MIPS Technologies "Release 6" */
|
H A D | meson.build | 21 target_arch += {'mips': mips_ss} 22 target_system_arch += {'mips': mips_system_ss} 23 target_user_arch += {'mips': mips_user_ss}
|
H A D | fpu_helper.h | 2 * Helpers for emulation of FPU-related MIPS instructions. 41 * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan) in restore_snan_bit_mode() 43 * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan) in restore_snan_bit_mode() 72 * According to MIPS specifications, if one of the two operands is in fp_reset()
|
H A D | Kconfig | 1 config MIPS config 7 select MIPS
|
/qemu/tests/tcg/mips/ |
H A D | Makefile.target | 3 # MIPS - included from tests/tcg/Makefile.target 6 MIPS_SRC=$(SRC_PATH)/tests/tcg/mips 11 # hello-mips is 32 bit only 13 MIPS_TESTS=hello-mips 17 hello-mips: CFLAGS+=-mno-abicalls -fno-PIC -fno-stack-protector -mabi=32 18 hello-mips: LDFLAGS+=-nostdlib
|
H A D | hello-mips.c | 2 * MIPS o32 Linux syscall example 4 * http://www.linux-mips.org/wiki/RISC/os 5 * http://www.linux-mips.org/wiki/MIPSABIHistory 6 * http://www.linux.com/howtos/Assembly-HOWTO/mips.shtml 9 * -mabi=32 -O2 -static -o hello-mips hello-mips.c
|
/qemu/docs/user/ |
H A D | main.rst | 156 - user mode (MIPS) 158 * ``qemu-mips`` executes 32-bit big endian MIPS binaries (MIPS O32 ABI). 160 * ``qemu-mipsel`` executes 32-bit little endian MIPS binaries (MIPS O32 ABI). 162 * ``qemu-mips64`` executes 64-bit big endian MIPS binaries (MIPS N64 ABI). 164 * ``qemu-mips64el`` executes 64-bit little endian MIPS binaries (MIPS N64 167 * ``qemu-mipsn32`` executes 32-bit big endian MIPS binaries (MIPS N32 ABI). 169 * ``qemu-mipsn32el`` executes 32-bit little endian MIPS binaries (MIPS N32
|
/qemu/tests/functional/ |
H A D | test_mipsel_malta.py | 3 # Functional tests for the little-endian 32-bit MIPS Malta board 22 ('http://mipsdistros.mips.com/LinuxDistro/nanomips/' 27 ('http://mipsdistros.mips.com/LinuxDistro/nanomips/' 32 ('http://mipsdistros.mips.com/LinuxDistro/nanomips/' 86 ('https://s3-eu-west-1.amazonaws.com/downloads-mips/mips-downloads/'
|
H A D | test_mips64_malta.py | 3 # Functional tests for the big-endian 64-bit MIPS Malta board 14 ('https://people.debian.org/~aurel32/qemu/mips/' 19 ('https://people.debian.org/~aurel32/qemu/mips/' 29 kernel_path, image_path, kernel_command_line, cpuinfo='MIPS 20Kc',
|
H A D | test_mipsel_replay.py | 3 # Replay tests for the little-endian 32-bit MIPS Malta board 14 ('http://mipsdistros.mips.com/LinuxDistro/nanomips/' 19 ('http://mipsdistros.mips.com/LinuxDistro/nanomips/' 24 ('http://mipsdistros.mips.com/LinuxDistro/nanomips/'
|
H A D | test_mips_malta.py | 3 # Functional tests for the big-endian 32-bit MIPS Malta board 18 'mips') 53 dl_file, hsum, nic='pcnet', cpuinfo='MIPS 24Kc'): 125 'mips/rootfs.cpio.gz'), 175 ('https://people.debian.org/~aurel32/qemu/mips/' 180 ('https://people.debian.org/~aurel32/qemu/mips/'
|
H A D | test_mips64el_malta.py | 3 # Functional tests for the little-endian 64-bit MIPS Malta board 58 'raw/9ad2df38/mips/malta/mips64el/' 87 'MIPS 5KE') 111 kernel_path, image_path, kernel_command_line, cpuinfo='MIPS 20Kc', 123 'mips/malta/mips64el/vmlinux-4.7.0-rc1.I6400.gz'),
|
/qemu/linux-user/mips64/ |
H A D | target_errno_defs.h | 5 * The mips64 target uses errno definitions taken from asm-mips/errno.h 6 * so directly use the mips target errno definitions. 8 #include "../mips/target_errno_defs.h"
|
/qemu/scripts/ |
H A D | update-mips-syscall-args.sh | 4 FILES="sysent.h sysent_shorthand_defs.h linux/mips/syscallent-compat.h \ 5 linux/mips/syscallent-o32.h linux/32/syscallent-common-32.h \ 13 INC=linux-user/mips/syscall-args-o32.c.inc 56 cc -o gen_mips_o32 -I linux/mips -I linux/generic gen_mips_o32.c && ./gen_mips_o32 > "$output/$INC"
|
H A D | update-syscalltbl.sh | 9 arch/mips/kernel/syscalls/syscall_n32.tbl,linux-user/mips64/syscall_n32.tbl \ 10 arch/mips/kernel/syscalls/syscall_n64.tbl,linux-user/mips64/syscall_n64.tbl \ 11 arch/mips/kernel/syscalls/syscall_o32.tbl,linux-user/mips/syscall_o32.tbl \
|
/qemu/hw/mips/ |
H A D | mipssim.c | 5 * proprietary MIPS emulator. 33 #include "hw/mips/mips.h" 189 error_report("Could not load MIPS bios '%s'", machine->firmware); in mips_mipssim_init() 219 * MIPS CPU INT2, which is interrupt 4. in mips_mipssim_init() 233 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ in mips_mipssim_init() 239 mc->desc = "MIPS MIPSsim platform"; in mips_mipssim_machine_init()
|
/qemu/linux-headers/asm-mips/ |
H A D | kvm.h | 7 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 18 * KVM MIPS specific structures and definitions. 48 * For MIPS, we use KVM_SET_ONE_REG and KVM_GET_ONE_REG to access various 168 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers. 193 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers. 200 * KVM MIPS specific structures and definitions
|