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/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,liointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips as the primary
18 - $ref: /schemas/interrupt-controller.yaml#
23 - const: loongson,liointc-1.0
24 - const: loongson,liointc-1.0a
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Dloongson,htvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
28 interrupt-controller: true
30 '#interrupt-cells':
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Dloongson,htpic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
21 const: loongson,htpic-1.0
32 interrupt-controller: true
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/linux-5.10/Documentation/devicetree/bindings/pci/
Dloongson.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/loongson.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCI Host Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 PCI host controller found on Loongson PCHs and SoCs.
16 - $ref: /schemas/pci/pci-bus.yaml#
21 - const: loongson,ls2k-pci
22 - const: loongson,ls7a-pci
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/linux-5.10/drivers/platform/mips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 MIPS platforms, including vendor-specific netbook/laptop/desktop
20 tristate "Loongson-3 CPU HWMon Driver"
25 Loongson-3A/3B CPU Hwmon (temperature sensor) driver.
28 bool "Loongson RS780E ACPI Controller"
31 Loongson RS780E PCH ACPI Controller driver.
Dcpu_hwmon.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/hwmon-sysfs.h>
9 #include <loongson.h>
17 * Loongson-3 series cpu has two sensors inside,
42 reg = ((reg >> 8) & 0xff) - 100; in loongson3_cpu_temp()
47 reg = (reg & 0xffff) * 731 / 0x4000 - 273; in loongson3_cpu_temp()
79 static SENSOR_DEVICE_ATTR(temp3_input, 0444, get_cpu_temp, NULL, 3);
80 static SENSOR_DEVICE_ATTR(temp3_label, 0444, cpu_temp_label, NULL, 3);
84 static const struct attribute *hwmon_cputemp[4][3] = {
110 int id = (to_sensor_dev_attr(attr))->index - 1; in cpu_temp_label()
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/linux-5.10/Documentation/devicetree/bindings/mips/loongson/
Drs780e-acpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mips/loongson/rs780e-acpi.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson RS780E PCH ACPI Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This controller can be found in Loongson-3 systems with RS780E PCH.
17 const: loongson,rs780e-acpi
23 - compatible
24 - reg
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/linux-5.10/drivers/gpio/
Dgpio-loongson.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson-2F/3A/3B GPIO Support
6 * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
20 #include <loongson.h>
97 struct device *dev = &pdev->dev; in loongson_gpio_probe()
101 return -ENOMEM; in loongson_gpio_probe()
103 gc->label = "loongson-gpio-chip"; in loongson_gpio_probe()
104 gc->base = 0; in loongson_gpio_probe()
105 gc->ngpio = LOONGSON_N_GPIO; in loongson_gpio_probe()
106 gc->get = loongson_gpio_get_value; in loongson_gpio_probe()
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/linux-5.10/arch/mips/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
124 bool "Generic board-agnostic MIPS kernel"
211 Support for the Texas Instruments AR7 System-on-a-Chip
282 Build a generic DT-based kernel image that boots on select
283 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
373 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
374 DECstation porting pages on <http://decstation.unix-ag.org/>.
413 Olivetti M700-10 workstations.
447 bool "Loongson 32-bit family of machines"
450 This enables support for the Loongson-1 family of machines.
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/linux-5.10/arch/mips/include/asm/mach-loongson64/
Dkernel-entry-init.h7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
32 /* Loongson-3A R4+ */
37 /* Loongson-3A R2/R3 */
67 /* Loongson-3A R4+ */
72 /* Loongson-3A R2/R3 */
Dloongson.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 /* machine-specific reboot/halt operation */
25 /* loongson-specific command line, env and memory initialization */
52 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
56 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
60 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
63 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
64 /* Loongson-3 specific registers */
67 #define LOONGSON3_REG_TOP (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
71 #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
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/linux-5.10/drivers/irqchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
216 bool "J-Core integrated AIC" if COMPILE_TEST
220 Support for the J-Core integrated AIC.
231 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
234 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
239 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
274 tristate "TS-4800 IRQ controller"
279 Support for the TS-4800 FPGA IRQ controller
442 bool "C-SKY Multi Processor Interrupt Controller"
445 Say yes here to enable C-SKY SMP interrupt controller driver used
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/linux-5.10/arch/mips/include/asm/
Dcpu.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 +----------------+----------------+----------------+----------------+
20 +----------------+----------------+----------------+----------------+
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
92 #define PRID_IMP_LOONGSON_32 0x4200 /* Loongson-1 */
95 #define PRID_IMP_LOONGSON_64R 0x6100 /* Reduced Loongson-2 */
96 #define PRID_IMP_LOONGSON_64C 0x6300 /* Classic Loongson-2 and Loongson-3 */
97 #define PRID_IMP_LOONGSON_64G 0xc000 /* Generic Loongson-2 and Loongson-3 */
252 #define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */
269 * 4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
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/linux-5.10/arch/mips/boot/dts/loongson/
Dloongson64v_4core_virtio.dts1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
5 /dts-v1/;
7 compatible = "loongson,loongson64v-4core-virtio";
8 #address-cells = <2>;
9 #size-cells = <2>;
11 cpuintc: interrupt-controller {
12 #address-cells = <0>;
13 #interrupt-cells = <1>;
14 interrupt-controller;
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Dloongson64c-package.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
6 #address-cells = <2>;
7 #size-cells = <2>;
9 cpuintc: interrupt-controller {
10 #address-cells = <0>;
11 #interrupt-cells = <1>;
12 interrupt-controller;
13 compatible = "mti,cpu-interrupt-controller";
17 compatible = "simple-bus";
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Dloongson64g-package.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/irq.h>
6 #address-cells = <2>;
7 #size-cells = <2>;
9 cpuintc: interrupt-controller {
10 #address-cells = <0>;
11 #interrupt-cells = <1>;
12 interrupt-controller;
13 compatible = "mti,cpu-interrupt-controller";
17 compatible = "simple-bus";
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Drs780e-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 compatible = "loongson,rs780e-pci";
15 #address-cells = <3>;
16 #size-cells = <2>;
26 #address-cells = <2>;
27 #size-cells = <1>;
34 interrupt-parent = <&htpic>;
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/linux-5.10/arch/mips/loongson64/
Ddma.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/dma-direct.h>
10 * Loongson-3's 48bit address space and embed it into 40bit */ in phys_to_dma()
19 * Loongson-3's 48bit address space and embed it into 40bit */ in dma_to_phys()
Dsmp.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* for Loongson-3 smp support */
12 #define SMP_CORE_GROUP3_BASE (smp_group[3])
/linux-5.10/arch/mips/loongson32/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
8 bool "Loongson LS1B board"
23 bool "Loongson LS1C board"
69 bool "Use PWM Timer 3"
71 Use PWM Timer 3 as the default clockevent/clocksourcer.
/linux-5.10/arch/mips/include/asm/mach-loongson32/
Dregs-pwm.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Loongson 1 PWM Register Definitions.
11 /* Loongson 1 PWM Timer Register Definitions */
22 #define PWM_OE BIT(3)
/linux-5.10/arch/mips/include/asm/mach-loongson2ef/
Dloongson.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 /* loongson internal northbridge initialization */
17 /* machine-specific reboot/halt operation */
25 /* loongson-specific command line, env and memory initialization */
71 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
75 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
79 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
82 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
86 #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
92 #define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */
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/linux-5.10/arch/mips/kernel/
Dcpu-probe.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 1994 - 2006 Ralf Baechle
19 #include <asm/cpu-features.h>
20 #include <asm/cpu-type.h>
27 #include <asm/pgtable-bits.h>
31 #include "fpu-probe.h"
33 #include <asm/mach-loongson64/cpucfg-emul.h>
130 cpu_data[0].tlbsize -= cpu_data[0].tlbsizeftlbways * in ftlb_disable()
146 c->options |= MIPS_CPU_MT_PER_TC_PERF_COUNTERS; in cpu_set_mt_per_tc_perf()
160 if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2) in check_errata()
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/linux-5.10/arch/mips/kvm/
Dloongson_ipi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson-3 Virtual IPI interrupt support.
5 * Copyright (C) 2019 Loongson Technologies, Inc. All rights reserved.
7 * Authors: Chen Zhu <zhuchen@loongson.cn>
54 uint32_t core = (addr >> 8) & 3; in loongson_vipi_read()
55 uint32_t node = (addr >> 44) & 3; in loongson_vipi_read()
59 struct ipi_state *s = &(ipi->ipistate[id]); in loongson_vipi_read()
61 BUG_ON(offset & (len - 1)); in loongson_vipi_read()
65 *(uint64_t *)val = s->status; in loongson_vipi_read()
69 *(uint64_t *)val = s->en; in loongson_vipi_read()
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/linux-5.10/arch/mips/oprofile/
Dop_model_loongson3.c16 #include <loongson.h>
24 #define LOONGSON3_PERFCTRL_USER (1UL << 3)
31 /* Loongson-3 PerfCount performance counter1 register */
37 /* Loongson-3 PerfCount performance counter2 register */
40 #define read_c0_perfhi2() __read_64bit_c0_register($25, 3)
41 #define write_c0_perfhi2(val) __write_64bit_c0_register($25, 3, val)
78 reg.reset_counter1 = 0x8000000000000000ULL - ctr[0].count; in loongson3_reg_setup()
88 reg.reset_counter2 = 0x8000000000000000ULL - ctr[1].count; in loongson3_reg_setup()

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