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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8450-rpmh.yaml122 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
H A Dqcom,sc7280-rpmh.yaml122 clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
H A Dqcom,milos-rpmh.yaml134 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>;
H A Dqcom,sm8550-rpmh.yaml136 clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h17 #define GCC_AGGRE_UFS_PHY_AXI_CLK 7 macro
H A Dqcom,gcc-sm6350.h22 #define GCC_AGGRE_UFS_PHY_AXI_CLK 11 macro
H A Dqcom,sm7150-gcc.h18 #define GCC_AGGRE_UFS_PHY_AXI_CLK 6 macro
H A Dqcom,qcs615-gcc.h20 #define GCC_AGGRE_UFS_PHY_AXI_CLK 10 macro
H A Dqcom,sm4450-gcc.h11 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
H A Dqcom,gcc-sc7280.h19 #define GCC_AGGRE_UFS_PHY_AXI_CLK 9 macro
H A Dqcom,milos-gcc.h19 #define GCC_AGGRE_UFS_PHY_AXI_CLK 8 macro
H A Dqcom,sm8750-gcc.h11 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
H A Dqcom,sm8550-gcc.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
H A Dqcom,qcs8300-gcc.h17 #define GCC_AGGRE_UFS_PHY_AXI_CLK 7 macro
H A Dqcom,gcc-sm8450.h22 #define GCC_AGGRE_UFS_PHY_AXI_CLK 10 macro
H A Dqcom,sm8650-gcc.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 1 macro
H A Dqcom,gcc-sm8150.h13 #define GCC_AGGRE_UFS_PHY_AXI_CLK 3 macro
H A Dqcom,gcc-sdm845.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 2 macro
H A Dqcom,gcc-sm8250.h16 #define GCC_AGGRE_UFS_PHY_AXI_CLK 6 macro
H A Dqcom,gcc-sm8350.h28 #define GCC_AGGRE_UFS_PHY_AXI_CLK 16 macro
H A Dqcom,sa8775p-gcc.h20 #define GCC_AGGRE_UFS_PHY_AXI_CLK 9 macro
H A Dqcom,gcc-sc8180x.h13 #define GCC_AGGRE_UFS_PHY_AXI_CLK 3 macro
H A Dqcom,x1e80100-gcc.h12 #define GCC_AGGRE_UFS_PHY_AXI_CLK 2 macro
H A Dqcom,gcc-sc8280xp.h23 #define GCC_AGGRE_UFS_PHY_AXI_CLK 12 macro
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml343 <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,

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