| /linux-6.15/drivers/gpu/drm/ci/xfails/ |
| D | i915-glk-skips.txt | 79 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
80 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
81 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
82 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
83 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
84 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
85 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
86 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
87 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
88 # i915 0000:00:02.0: [drm] *ERROR* AUX A/DDI A/PHY A: not done (status 0x00000000)
[all …]
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| /linux-6.15/arch/arm64/kvm/hyp/ |
| D | exception.c | 85 * For the SPSR_ELx layout for AArch64, see ARM DDI 0487E.a page C5-429.
86 * For the SPSR_ELx layout for AArch32, see ARM DDI 0487E.a page C5-426.
140 // See ARM DDI 0487E.a, page D5-2579. in enter_exception64()
144 // See ARM DDI 0487E.a, page D5-2578. in enter_exception64()
150 // See ARM DDI 0487E.a, page D2-2452. in enter_exception64()
153 // See ARM DDI 0487E.a, page D1-2306. in enter_exception64()
156 // See ARM DDI 0487E.a, page D13-3258 in enter_exception64()
161 // See ARM DDI 0487E.a, pages D1-2293 to D1-2294. in enter_exception64()
183 * - ARM DDI 0406C.d, page B1-1148
184 * - ARM DDI 0487E.a, page G8-6264
[all …]
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| /linux-6.15/Documentation/trace/coresight/ |
| D | coresight-cpu-debug.rst | 12 (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
45 'ED' for register prefix (ARM DDI 0487A.k, chapter H9.1) and AArch32 uses
46 'DBG' as prefix (ARM DDI 0487A.k, chapter G5.1). The driver is unified to
49 - ARMv8-a (ARM DDI 0487A.k) and ARMv7-a (ARM DDI 0406C.b) have different
56 detailed description for offset is in ARMv7-a ARM (ARM DDI 0406C.b) chapter
70 have been enabled properly. In ARMv8-a ARM (ARM DDI 0487A.k) chapter 'H9.1
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| /linux-6.15/drivers/input/serio/ |
| D | hil_mlc.c | 254 mlc->di_map[mlc->ddi] = rc; in hilse_match()
255 mlc->serio_map[rc].di_revmap = mlc->ddi; in hilse_match()
261 mlc->di_map[mlc->ddi] = rc; in hilse_match()
265 mlc->serio_map[rc].di_revmap = mlc->ddi; in hilse_match()
305 mlc->ddi = val; in hilse_set_ddi()
313 mlc->ddi--; in hilse_dec_ddi()
314 if (mlc->ddi <= -1) { in hilse_dec_ddi()
315 mlc->ddi = -1; in hilse_dec_ddi()
319 hil_mlc_clear_di_map(mlc, mlc->ddi + 1); in hilse_dec_ddi()
326 BUG_ON(mlc->ddi >= 6); in hilse_inc_ddi()
[all …]
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| /linux-6.15/Documentation/devicetree/bindings/display/panel/ |
| D | jdi,lpm102a188a.yaml | 37 ddi-supply:
56 - ddi-supply
88 ddi-supply = <&pp1800_lcdio>;
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| /linux-6.15/drivers/gpu/drm/i915/display/ |
| D | intel_combo_phy.c | 168 * VBT's 'dvo port' field for child devices references the DDI, not in ehl_vbt_ddi_d_present()
178 * DDI-D _and_ an internal display on DDI-A/DSI leave an error message in ehl_vbt_ddi_d_present()
329 * display (via DDI-D) or an internal display (via DDI-A or in icl_combo_phys_init()
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| D | intel_fdi.c | 34 * DDI does not have a specific FDI_TX register. in assert_fdi_tx()
89 /* On Haswell, DDI ports are responsible for the FDI PLL setup */ in assert_fdi_tx_pll_enabled()
869 /* Starting with Haswell, different DDI ports can work in FDI mode for
871 * both the DDI port and PCH receiver for the desired DDI buffer settings.
873 * The recommended port to work in FDI mode is DDI E, which we use here. Also,
874 * please note that when FDI mode is active on DDI E, it shares 2 lines with
875 * DDI A (which is used for eDP)
927 /* Configure and enable DDI_BUF_CTL for DDI E with next voltage. in hsw_fdi_link_train()
928 * DDI E does not support port reversal, the functionality is in hsw_fdi_link_train()
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| D | intel_ddi.c | 120 * Starting with Haswell, DDI port buffers must be programmed with correct
151 * Starting with Haswell, DDI port buffers must be programmed with correct
209 drm_err(display->drm, "Timeout waiting for DDI BUF %c to get idle\n", in intel_wait_ddi_buf_idle()
234 drm_err(display->drm, "Timeout waiting for DDI BUF %c to get active\n", in intel_wait_ddi_buf_active()
650 * bit for the DDI function and enables the DP2 configuration. Called for all
671 * Disable the DDI function and port syncing.
672 * For SST, pre-TGL MST, TGL+ MST-slave transcoders: deselect the DDI port,
717 drm_dbg_kms(display->drm, "Quirk Increase DDI disabled time\n"); in intel_ddi_disable_transcoder_func()
1151 * used on all DDI platforms. Should that change we need to
2128 * For DSI we keep the ddi clocks gated in intel_ddi_sanitize_encoder_pll_mapping()
[all …]
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| D | intel_dpio_phy.c | 129 * struct bxt_dpio_phy_info - Hold info for a broxton DDI phy
368 "DDI PHY %d powered, but power hasn't settled\n", phy); in bxt_dpio_phy_is_enabled()
375 "DDI PHY %d powered, but still in reset\n", phy); in bxt_dpio_phy_is_enabled()
410 drm_dbg(display->drm, "DDI PHY %d already enabled, " in _bxt_dpio_phy_init()
416 "DDI PHY %d enabled with invalid state, " in _bxt_dpio_phy_init()
530 drm_dbg(display->drm, "DDI PHY %d reg %pV [%08x] state mismatch: " in __phy_reg_verify_state()
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| D | intel_display_power_map.c | 101 POWER_DOMAIN_PORT_CRT, /* DDI E */
135 POWER_DOMAIN_PORT_CRT, /* DDI E */
1049 * - top-level GTC (DDI-level GTC is in the well associated with the DDI)
1296 * - Top-level GTC (DDI-level GTC is in the well associated with the DDI)
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| D | icl_dsi.c | 246 * table in BSPEC under DDI buffer programming. in dsi_program_swing_and_deemphasis()
524 drm_err(display->drm, "DDI port:%c buffer idle\n", in gen11_dsi_enable_ddi_buffer()
831 /* enable DDI buffer */ in gen11_dsi_configure_transcoder()
1113 /* step 4a: power up all lanes of the DDI used by DSI */ in gen11_dsi_enable_port_and_phy()
1125 /* enable DDI buffer */ in gen11_dsi_enable_port_and_phy()
1342 /* disable ddi function */ in gen11_dsi_deconfigure_trancoder()
1375 "DDI port:%c buffer not idle\n", in gen11_dsi_disable_port()
1398 /* set mode to DDI */ in gen11_dsi_disable_io_power()
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| /linux-6.15/lib/tests/ |
| D | longest_symbol_kunit.c | 18 #define DDI(name) DI(n##name##name) macro
19 #define DDDI(name) DDI(n##name##name)
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| /linux-6.15/drivers/gpu/drm/amd/display/include/ |
| D | grph_object_ctrl_defs.h | 238 * DDI PHY channel mapping reflecting XBAR setting
254 /* DDI PHY ID for the transmitter */
256 /* DDI PHY channel mapping reflecting crossbar setting */
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| /linux-6.15/tools/perf/arch/arm64/util/ |
| D | tsc.c | 12 * According to ARM DDI 0487F.c, from Armv8.0 to Armv8.5 inclusive, the in rdtsc()
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| /linux-6.15/tools/testing/selftests/arm64/signal/ |
| D | sve_helpers.c | 39 * See the ARM ARM, DDI 0487K.a, B1.4.2: I_QQRNR and I_NWYBP. in sve_fill_vls()
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| /linux-6.15/Documentation/translations/zh_TW/arch/arm64/ |
| D | hugetlbpage.rst | 32 架構中轉換頁表條目(D4.5.3, ARM DDI 0487C.a)中提供一個連續
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| /linux-6.15/Documentation/translations/zh_CN/arch/arm64/ |
| D | hugetlbpage.rst | 29 架构中转换页表条目(D4.5.3, ARM DDI 0487C.a)中提供一个连续
|
| /linux-6.15/Documentation/devicetree/bindings/arm/ |
| D | arm,vexpress-juno.yaml | 72 in a test chip on the core tile. See ARM DDI 0503I.
77 cores in a test chip on the core tile. See ARM DDI 0498D.
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| D | arm,coresight-cpu-debug.yaml | 17 reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
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| /linux-6.15/Documentation/arch/arm64/ |
| D | hugetlbpage.rst | 27 (D4.5.3, ARM DDI 0487C.a) that hints to the MMU to indicate that it is one of a
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| D | mops.rst | 18 the Arm Architecture Reference Manual DDI 0487K.a (Arm ARM).
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| /linux-6.15/drivers/iommu/riscv/ |
| D | iommu.c | 579 * DDI[0]: bits 0 - 6 (1st level) (7 bits) in riscv_iommu_get_dc()
580 * DDI[1]: bits 7 - 15 (2nd level) (9 bits) in riscv_iommu_get_dc()
581 * DDI[2]: bits 16 - 23 (3rd level) (8 bits) in riscv_iommu_get_dc()
584 * DDI[0]: bits 0 - 5 (1st level) (6 bits) in riscv_iommu_get_dc()
585 * DDI[1]: bits 6 - 14 (2nd level) (9 bits) in riscv_iommu_get_dc()
586 * DDI[2]: bits 15 - 23 (3rd level) (9 bits) in riscv_iommu_get_dc()
608 * nodes are indexed by DDI[depth]. in riscv_iommu_get_dc()
641 * Grab the node that matches DDI[depth], note that when using base in riscv_iommu_get_dc()
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| /linux-6.15/arch/arm64/kernel/ |
| D | cpuinfo.c | 306 * whose upper 32 bits are RES0 (per C5.1.1, ARM DDI 0487A.i), however
308 * be made use of in future, and between ARM DDI 0487A.c and ARM DDI
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| /linux-6.15/drivers/pci/ |
| D | pci-driver.c | 307 struct drv_dev_and_id *ddi = _ddi; in local_pci_probe() local
308 struct pci_dev *pci_dev = ddi->dev; in local_pci_probe()
309 struct pci_driver *pci_drv = ddi->drv; in local_pci_probe()
324 rc = pci_drv->probe(pci_dev, ddi->id); in local_pci_probe()
354 struct drv_dev_and_id ddi = { drv, dev, id }; in pci_call_probe() local
390 error = work_on_cpu(cpu, local_pci_probe, &ddi); in pci_call_probe()
392 error = local_pci_probe(&ddi); in pci_call_probe()
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| /linux-6.15/include/linux/amba/ |
| D | kmi.h | 11 * Reference Manual - ARM DDI 0143B - see http://www.arm.com/
|