| /linux/include/dt-bindings/interconnect/ |
| H A D | qcom,sm6350.h | 25 #define MASTER_USB3 7
36 #define SLAVE_QUP_CORE_0 7
51 #define SLAVE_BOOT_ROM 7
101 #define MASTER_SNOC_SF_MEM_NOC 7
116 #define SLAVE_MNOC_HF_MEM_NOC 7
127 #define SLAVE_NPU_LLM_CFG 7
139 #define SNOC_CNOC_SLV 7
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| /linux/drivers/pinctrl/renesas/ |
| H A D | pfc-r8a7792.c | 21 PORT_GP_CFG_17(7, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
752 RCAR_GP_PIN(7, 9),
758 RCAR_GP_PIN(7, 10),
764 RCAR_GP_PIN(7, 11),
770 RCAR_GP_PIN(7, 7), RCAR_GP_PIN(7, 8),
783 RCAR_GP_PIN(7, 12), RCAR_GP_PIN(6, 13), RCAR_GP_PIN(7, 5),
784 RCAR_GP_PIN(7, 0), RCAR_GP_PIN(6, 11),
799 RCAR_GP_PIN(6, 12), RCAR_GP_PIN(7, 1), RCAR_GP_PIN(7, 2),
800 RCAR_GP_PIN(7, 3), RCAR_GP_PIN(7, 4),
803 RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), RCAR_GP_PIN(6, 7),
[all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| H A D | smu11_driver_if_vangogh.h | 74 uint32_t MmHubPadding[7]; // SMU internal use
103 #define NUM_DCFCLK_DPM_LEVELS 7
104 #define NUM_DISPCLK_DPM_LEVELS 7
105 #define NUM_DPPCLK_DPM_LEVELS 7
106 #define NUM_SOCCLK_DPM_LEVELS 7
107 #define NUM_ISPICLK_DPM_LEVELS 7
108 #define NUM_ISPXCLK_DPM_LEVELS 7
162 #define THROTTLER_STATUS_BIT_TDC_VDD 7
242 #define WORKLOAD_PPLIB_UNCAPPED_BIT 7
252 #define TABLE_SMU_METRICS 7 // Called by Driver
[all …]
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| /linux/sound/soc/codecs/ |
| H A D | rk3328_codec.h | 45 #define DAC_I2S_LRP_MASK BIT(7)
46 #define DAC_I2S_LRP_NORMAL (0x0 << 7)
47 #define DAC_I2S_LRP_REVERSAL (0x1 << 7)
76 #define DAC_CHARGE_XCHARGE_MASK BIT(7)
77 #define DAC_CHARGE_DISCHARGE (0x0 << 7)
78 #define DAC_CHARGE_PRECHARGE (0x1 << 7)
115 #define DACL_REFV_MASK BIT(7)
116 #define DACL_REFV_OFF (0x0 << 7)
117 #define DACL_REFV_ON (0x1 << 7)
169 #define HPOUTL_MASK BIT(7)
[all …]
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| H A D | wm8971.c | 50 { 7, 0x000a },
112 SOC_ENUM_SINGLE(WM8971_BASS, 7, 2, wm8971_bass), /* 0 */
115 SOC_ENUM_SINGLE(WM8971_ALC1, 7, 4, wm8971_alc_func),
132 SOC_DOUBLE_R("Capture Switch", WM8971_LINVOL, WM8971_RINVOL, 7, 1, 1),
135 WM8971_ROUT1V, 7, 1, 0),
137 WM8971_ROUT2V, 7, 1, 0),
138 SOC_SINGLE("Mono Playback ZC Switch", WM8971_MOUTV, 7, 1, 0),
143 WM8971_LOUTM2, 4, 7, 1),
145 WM8971_ROUTM2, 4, 7, 1),
147 WM8971_MOUTM2, 4, 7, 1),
[all …]
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| H A D | rt5660.h | 137 #define RT5660_R_MUTE (0x1 << 7)
138 #define RT5660_R_MUTE_SFT 7
151 #define RT5660_IN_DF2 (0x1 << 7)
152 #define RT5660_IN_SFT2 7
161 #define RT5660_IN_DF4 (0x1 << 7)
162 #define RT5660_IN_SFT4 7
199 #define RT5660_M_ADCMIX_R (0x1 << 7)
200 #define RT5660_M_ADCMIX_R_SFT 7
311 #define RT5660_G_BST1_OM_L_MASK (0x7 << 7)
312 #define RT5660_G_BST1_OM_L_SFT 7
[all …]
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| H A D | rt5665.h | 435 #define RT5665_R_MUTE (0x1 << 7)
436 #define RT5665_R_MUTE_SFT 7
459 #define RT5665_IN2_DF_MASK (0x1 << 7)
460 #define RT5665_IN2_DF 7
469 #define RT5665_IN4_DF_MASK (0x1 << 7)
470 #define RT5665_IN4_DF 7
616 #define RT5665_M_STO1_ADC_R1 (0x1 << 7)
617 #define RT5665_M_STO1_ADC_R1_SFT 7
645 #define RT5665_M_MONO_ADC_R1 (0x1 << 7)
646 #define RT5665_M_MONO_ADC_R1_SFT 7
[all …]
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| /linux/drivers/mfd/ |
| H A D | rc5t583-irq.c | 101 [RC5T583_IRQ_WD] = RC5T583_IRQ(SYS_INT, 0, 7, 7, 0),
114 [RC5T583_IRQ_WALE] = RC5T583_IRQ(RTC_INT, 2, 7, 7, 3),
123 [RC5T583_IRQ_AIN2H] = RC5T583_IRQ(ADC_INT, 3, 7, 1, 5),
130 [RC5T583_IRQ_GPIO0] = RC5T583_IRQ(GPIO_INT, 4, 0, 0, 7),
131 [RC5T583_IRQ_GPIO1] = RC5T583_IRQ(GPIO_INT, 4, 1, 1, 7),
132 [RC5T583_IRQ_GPIO2] = RC5T583_IRQ(GPIO_INT, 4, 2, 2, 7),
133 [RC5T583_IRQ_GPIO3] = RC5T583_IRQ(GPIO_INT, 4, 3, 3, 7),
134 [RC5T583_IRQ_GPIO4] = RC5T583_IRQ(GPIO_INT, 4, 4, 4, 7),
135 [RC5T583_IRQ_GPIO5] = RC5T583_IRQ(GPIO_INT, 4, 5, 5, 7),
136 [RC5T583_IRQ_GPIO6] = RC5T583_IRQ(GPIO_INT, 4, 6, 6, 7),
[all …]
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-iob-defs.h | 765 uint64_t crd:7;
767 uint64_t crd:7;
778 uint64_t crd:7;
780 uint64_t crd:7;
791 uint64_t crd:7;
793 uint64_t crd:7;
804 uint64_t crd:7;
806 uint64_t crd:7;
817 uint64_t crd:7;
819 uint64_t crd:7;
[all …]
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7988-topckgen.c | 108 0, 2, 7, 0x1c0, 0),
117 0x018, 0, 1, 7, 0x1C0, 4),
123 24, 3, 31, 0x1c0, 7),
126 0x024, 0x028, 0, 1, 7, 0x1C0, 8, CLK_IS_CRITICAL),
134 MUX_GATE_CLR_SET_UPD(CLK_TOP_SPI_SEL, "spi_sel", spi_parents, 0x030, 0x034, 0x038, 0, 3, 7,
143 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x040, 0x044, 0x048, 0, 3, 7,
153 0x054, 0x058, 0, 3, 7, 0x1C0, 20),
162 0x064, 0x068, 0, 1, 7, 0x1C0, 24),
171 0x070, 0x074, 0x078, 0, 1, 7, 0x1C0, 28),
180 0, 1, 7, 0x1c4, 1),
[all …]
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| /linux/drivers/hwmon/pmbus/ |
| H A D | mp2891.c | 306 ret = (ret & GENMASK(7, 0)) - MP2891_TEMP_LIMIT_OFFSET; in mp2891_read_word_data()
318 ret = (ret & GENMASK(7, 0)) * 4; in mp2891_read_word_data()
326 ret = FIELD_GET(GENMASK(7, 0), ret) * MP2891_UV_LIMIT_SCALE - in mp2891_read_word_data()
329 ret = FIELD_GET(GENMASK(7, 0), ret) * MP2891_UV_LIMIT_SCALE; in mp2891_read_word_data()
339 ret = FIELD_GET(GENMASK(7, 0), ret) * MP2891_OV_LIMIT_SCALE + in mp2891_read_word_data()
342 ret = FIELD_GET(GENMASK(7, 0), ret) * MP2891_OV_LIMIT_SCALE; in mp2891_read_word_data()
350 ret = DIV_ROUND_CLOSEST((ret & GENMASK(7, 0)) * data->iout_scale[page] * in mp2891_read_word_data()
405 * The PMBUS_VOUT_UV_FAULT_LIMIT[7:0] is the limit value, and bit8-bit15 in mp2891_write_word_data()
414 (ret & ~GENMASK(7, 0)) | in mp2891_write_word_data()
415 FIELD_PREP(GENMASK(7, 0), in mp2891_write_word_data()
[all …]
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| /linux/drivers/power/supply/ |
| H A D | qcom_smbx.c | 28 #define BVR_INITIAL_RAMP_BIT BIT(7)
35 #define INPUT_CURRENT_LIMITED_BIT BIT(7)
47 #define CHARGE_CURRENT_POST_JEITA_MASK GENMASK(7, 0)
50 #define ENABLE_TRICKLE_BIT BIT(7)
63 #define CHG_EN_SRC_BIT BIT(7)
76 #define FAST_CHARGE_CURRENT_SETTING_MASK GENMASK(7, 0)
79 #define FLOAT_VOLTAGE_SETTING_MASK GENMASK(7, 0)
95 #define TYPE_C_CHANGE_RT_STS_BIT BIT(7)
105 #define OTG_RESERVED_MASK GENMASK(7, 6)
117 #define APSD_STATUS_7_BIT BIT(7)
[all …]
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| /linux/Documentation/hwmon/ |
| H A D | gxp-fan-ctrl.rst | 25 pwm[0-7] Fan 0 to 7 respective PWM value (0-255)
26 fan[0-7]_fault Fan 0 to 7 respective fault status: 1 fail, 0 ok
27 fan[0-7]_enable Fan 0 to 7 respective enabled status: 1 enabled, 0 disabled
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_regs.c | 47 [RC_QSYS_CAL_AUTO] = 7,
157 [FP_CPU_PROC_CTRL_CFGTE] = 7,
161 [FP_DEV2G5_PHAD_CTRL_PHAD_ENA] = 7,
163 [FP_FDMA_CH_CFG_CH_XTR_STATUS_MODE] = 7,
169 [FP_PTP_PHAD_CTRL_PHAD_ENA] = 7,
194 [FW_HSCH_SE_CFG_SE_DWRR_CNT] = 7,
196 [FW_HSCH_SE_DLB_SENSE_SE_DLB_DPORT] = 7,
199 [FW_HSCH_FLUSH_CTRL_FLUSH_PORT] = 7,
208 [FW_QFWD_FRAME_COPY_CFG_FRMC_PORT_VAL] = 7,
216 [FW_REW_RTAG_ETAG_CTRL_IPE_TBL] = 7,
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3288.c | 231 RK3288_MODE_CON, 8, 7, ROCKCHIP_PLL_SYNC_RATE, rk3288_pll_rates),
315 RK3288_CLKGATE_CON(12), 7, GFLAGS),
356 RK3288_CLKGATE_CON(0), 7, GFLAGS),
361 RK3288_CLKSEL_CON(4), 15, 1, MFLAGS, 0, 7, DFLAGS,
376 RK3288_CLKSEL_CON(5), 0, 7, DFLAGS,
385 RK3288_CLKSEL_CON(40), 0, 7, DFLAGS,
386 RK3288_CLKGATE_CON(4), 7, GFLAGS),
421 RK3288_GRF_SOC_CON(0), 7, 1, MFLAGS, grf_type_sys),
486 RK3288_CLKGATE_CON(3), 7, GFLAGS),
498 RK3288_CLKGATE_CON(5), 7, GFLAGS),
[all …]
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| /linux/include/linux/firmware/intel/ |
| H A D | stratix10-smc.h | 88 * a2-7: not used.
108 * a3-7: not used.
133 * a1-7: not used.
157 * a1-7: not used.
176 * a1-7: not used.
196 * a1-7: not used.
214 * a2-7: not used.
221 #define INTEL_SIP_SMC_FUNCID_REG_READ 7
234 * a3-7: not used.
255 * a4-7: not used.
[all …]
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| /linux/drivers/gpu/drm/bridge/analogix/ |
| H A D | analogix_dp_reg.h | 126 #define MASTER_VID_FUNC_EN_N (0x1 << 7)
137 #define SSC_FUNC_EN_N (0x1 << 7)
143 #define VIDEO_EN (0x1 << 7)
147 #define IN_D_RANGE_MASK (0x1 << 7)
148 #define IN_D_RANGE_SHIFT (7)
149 #define IN_D_RANGE_CEA (0x1 << 7)
150 #define IN_D_RANGE_VESA (0x0 << 7)
164 #define IN_YC_COEFFI_MASK (0x1 << 7)
165 #define IN_YC_COEFFI_SHIFT (7)
166 #define IN_YC_COEFFI_ITU709 (0x1 << 7)
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/alderlake/ |
| H A D | floating-point.json | 13 "Counter": "0,1,2,3,4,5,6,7",
33 "Counter": "0,1,2,3,4,5,6,7",
43 "Counter": "0,1,2,3,4,5,6,7",
53 "Counter": "0,1,2,3,4,5,6,7",
63 "Counter": "0,1,2,3,4,5,6,7",
73 "Counter": "0,1,2,3,4,5,6,7",
83 "Counter": "0,1,2,3,4,5,6,7",
93 "Counter": "0,1,2,3,4,5,6,7",
103 "Counter": "0,1,2,3,4,5,6,7",
113 "Counter": "0,1,2,3,4,5,6,7",
[all …]
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| /linux/drivers/comedi/drivers/ni_routing/ni_device_routes/ |
| H A D | pci-6723.c | 160 .dest = TRIGGER_LINE(7),
176 NI_PFI(7),
186 TRIGGER_LINE(7),
203 NI_PFI(7),
213 TRIGGER_LINE(7),
230 NI_PFI(7),
254 NI_PFI(7),
299 NI_PFI(7),
324 NI_PFI(7),
334 TRIGGER_LINE(7),
[all …]
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| H A D | pci-6713.c | 160 .dest = TRIGGER_LINE(7),
176 NI_PFI(7),
186 TRIGGER_LINE(7),
203 NI_PFI(7),
213 TRIGGER_LINE(7),
230 NI_PFI(7),
254 NI_PFI(7),
299 NI_PFI(7),
324 NI_PFI(7),
334 TRIGGER_LINE(7),
[all …]
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| /linux/tools/perf/pmu-events/arch/x86/pantherlake/ |
| H A D | memory.json | 4 "Counter": "2,3,4,5,6,7,8,9",
17 "Counter": "2,3,4,5,6,7,8,9",
30 "Counter": "2,3,4,5,6,7,8,9",
43 "Counter": "2,3,4,5,6,7,8,9",
56 "Counter": "2,3,4,5,6,7,8,9",
69 "Counter": "2,3,4,5,6,7,8,9",
82 "Counter": "2,3,4,5,6,7,8,9",
95 "Counter": "2,3,4,5,6,7,8,9",
108 "Counter": "2,3,4,5,6,7,8,9",
121 "Counter": "2,3,4,5,6,7,8,9",
[all …]
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| /linux/include/math-emu/ |
| H A D | op-8.h | 30 #define _FP_FRAC_HIGH_8(X) (X##_f[7])
41 for (_i = 7; _i >= _skip; --_i) \
45 for (_i = 7; _i > _skip; --_i) \
61 for (_i = 0; _i <= 7-_skip; ++_i) \
65 for (_i = 0; _i < 7-_skip; ++_i) \
68 X##_f[_i++] = X##_f[7] >> _down; \
92 for (_i = 0; _i <= 7-_skip; ++_i) \
96 for (_i = 0; _i < 7-_skip; ++_i) \
99 X##_f[_i++] = X##_f[7] >> _down; \
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| /linux/include/linux/mfd/ |
| H A D | stpmic1.h | 102 #define BUCK_VOLTAGE_MASK GENMASK(7, 2)
113 #define BUCKS_PD_CR_REG_MASK GENMASK(7, 0)
116 #define LDO1234_PULL_DOWN_REGISTER_MASK GENMASK(7, 0)
148 #define LDO_BYPASS_MASK BIT(7)
174 #define SWIN_DETECTOR_ENABLED BIT(7)
177 #define VINLOW_CTRL_REG_MASK GENMASK(7, 0)
182 #define BOOST_OVP_DISABLED BIT(7)
194 #define PONKEY_PWR_OFF BIT(7)
197 #define PONKEY_TURNOFF_MASK GENMASK(7, 0)
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| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | reg.h | 93 #define B_AX_BTMODE_MASK GENMASK(7, 6)
109 #define B_AX_DBG_SEL0 GENMASK(7, 0)
117 #define B_AX_GPIO_IN_15_TO_8_MASK GENMASK(7, 0)
175 #define B_AX_PCIE_MIO_ADDR_MASK GENMASK(7, 0)
203 #define B_AX_WCPU_FWDL_STS_MASK GENMASK(7, 5)
232 #define B_AX_UDM1_WCPU_C2H_ENQ_CNT_MASK GENMASK(7, 4)
264 #define B_AX_WL_XTAL_SI_ADDR_MASK GENMASK(7, 0)
284 #define B_AX_PINMUX_GPIO9_FUNC_SEL_MASK GENMASK(7, 4)
287 #define B_AX_PINMUX_EESK_FUNC_SEL_MASK GENMASK(7, 4)
290 #define B_AX_PINMUX_GPIO17_FUNC_SEL_MASK GENMASK(7, 4)
[all …]
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| /linux/drivers/net/ieee802154/ |
| H A D | mcr20a.h | 257 #define DAR_IRQSTS1_RX_FRM_PEND BIT(7)
267 #define DAR_IRQSTS2_CRCVALID BIT(7)
277 #define DAR_IRQSTS3_TMR4MSK BIT(7)
287 #define DAR_PHY_CTRL1_TMRTRIGEN BIT(7)
296 #define DAR_PHY_CTRL2_CRC_MSK BIT(7)
306 #define DAR_PHY_CTRL3_TMR4CMP_EN BIT(7)
318 #define DAR_PHY_CTRL4_TRCV_MSK BIT(7)
337 #define DAR_ASM_CTRL1_CLEAR BIT(7)
346 #define DAR_ASM_CTRL2_DATA_REG_TYPE_SEL (7)
351 #define DAR_CLK_OUT_CTRL_EXTEND BIT(7)
[all …]
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