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/qemu/include/hw/acpi/
H A Dghes.h42 /* CMCI, ACPI 5.0: 18.3.2.7, Table 18-290 */
44 /* MCE, ACPI 5.0: 18.3.2.7, Table 18-290 */
46 /* GPIO-Signal, ACPI 6.0: 18.3.2.7, Table 18-332 */
48 /* ARMv8 SEA, ACPI 6.1: 18.3.2.9, Table 18-345 */
50 /* ARMv8 SEI, ACPI 6.1: 18.3.2.9, Table 18-345 */
52 /* External Interrupt - GSIV, ACPI 6.1: 18.3.2.9, Table 18-345 */
54 /* Software Delegated Exception, ACPI 6.2: 18.3.2.9, Table 18-383 */
/qemu/include/hw/misc/
H A Daspeed_scu.h108 * 18:16 MAC AHB bus clock divider selection
124 * 18 H-PLL parameter selection
136 #define SCU_AST2400_H_PLL_PROGRAMMED (0x1 << 18)
146 * 18:13 H-PLL Post Divider
169 * 23,18 Clock source selection
202 /* bit 23, 18 [1,0] */
204 | (((x) & 0x1) << 18))
206 | (((x) >> 18) & 0x1))
207 #define SCU_AST2400_HW_STRAP_CLK_SOURCE_MASK ((0x1 << 23) | (0x1 << 18))
214 #define SCU_HW_STRAP_CLK_48M_IN (0x1 << 18)
[all …]
H A Dxlnx-versal-cframe-reg.h83 FIELD(CFRM_ISR0, READ_REG_ADDR_ERROR, 18, 1)
108 FIELD(CFRM_IMR0, READ_REG_ADDR_ERROR, 18, 1)
133 FIELD(CFRM_IER0, READ_REG_ADDR_ERROR, 18, 1)
158 FIELD(CFRM_IDR0, READ_REG_ADDR_ERROR, 18, 1)
183 FIELD(CFRM_ITR0, READ_REG_ADDR_ERROR, 18, 1)
H A Dxlnx-zynqmp-crf.h47 FIELD(APLL_FRAC_CFG, ORDER, 18, 1)
67 FIELD(DPLL_FRAC_CFG, ORDER, 18, 1)
87 FIELD(VPLL_FRAC_CFG, ORDER, 18, 1)
169 FIELD(RST_FPD_TOP, PCIE_BRIDGE_RESET, 18, 1)
/qemu/target/mips/
H A Dcpu.h61 #define FCR0_PS 18
71 #define FCR31_NAN2008 18
194 * Register 16 Register 17 Register 18 Register 19
264 #define CP0_REGISTER_18 18
386 /* CP0 Register 18 */
505 #define MSACSR_NX 18
570 #define CP0VPEC0_SCS 18
667 #define CP0PF_UDI 18 /* 23..18 */
673 #define CP0PF_UDW 18 /* 23..18 */
684 #define CP0PS_UDW 18 /* 23..18 */
[all …]
/qemu/include/hw/usb/
H A Ddwc2-regs.h53 #define GOTGCTL_ASESVLD BIT(18)
66 #define GOTGINT_A_DEV_TOUT_CHG BIT(18)
105 #define GUSBCFG_ULPI_AUTO_RES BIT(18)
154 #define GINTSTS_IEPINT BIT(18)
250 #define GHWCFG2_PERIO_EP_SUPPORTED BIT(18)
366 #define GPWRDN_STS_CHGINT_MSK BIT(18)
403 #define ADPCTL_ENASNS BIT(18)
444 #define DCFG_EPMISCNT_MASK (0x1f << 18)
445 #define DCFG_EPMISCNT_SHIFT 18
447 #define DCFG_EPMISCNT(_x) ((_x) << 18)
[all …]
/qemu/linux-user/hppa/
HDvdso.so ... linux-vdso32.so.1 LINUX_5.18 _DYNAMIC __GNU_EH_FRAME_HDR __kernel_sigtramp_rt _GLOBAL_OFFSET_TABLE_ LINUX_5.18 .symtab .strtab ...
H A Dvdso.S74 .cfi_offset 18, offsetof_sigcontext_gr + 18 * 4
118 .cfi_offset 60, offsetof_sigcontext_fr + 18 * 8
119 .cfi_offset 61, offsetof_sigcontext_fr + 18 * 8 + 4
/qemu/tests/qemu-iotests/
H A D07058 $QEMU_IO -r -c "read -pP 0xa5 0 18M" "$TEST_IMG" 2>&1 | _filter_testdir \
62 $QEMU_IO -c "read -pP 0xa5 0 18M" "$TEST_IMG" | _filter_qemu_io
71 $QEMU_IO -r -c "read -pP 0xa5 0 18M" "$TEST_IMG" 2>&1 | _filter_testdir \
H A D271352 for c in $(seq 18 28); do
356 # Cluster-aligned request from clusters #18 to #20
358 _run_test c=18 sc=0 len=192k cmd=zero
408 alloc="15 19"; zero="$(seq 16 18)" # copy-on-write happening here
468 for c in $(seq 18 28); do
472 # Cluster-aligned request from clusters #18 to #20
474 _run_test c=18 sc=0 len=192k cmd=unmap
826 # and allocates subclusters #13 and #18.
827 alloc="13 18"; zero="7"
852 alloc="$(seq 13 18)"; zero="7" _verify_l2_bitmap 0
[all …]
H A D070.out9 18 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
20 18 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
/qemu/gdb-xml/
H A Di386-32bit.xml17 <field name="AC" start="18" end="18"/>
70 <field name="AM" start="18" end="18"/>
107 <field name="OSXSAVE" start="18" end="18"/>
H A Di386-64bit.xml18 <field name="AC" start="18" end="18"/>
85 <field name="AM" start="18" end="18"/>
108 <field name="OSXSAVE" start="18" end="18"/>
/qemu/hw/intc/
H A Dxlnx-zynqmp-ipi.c56 FIELD(IPI_TRIG, PMU_2, 18, 1)
68 FIELD(IPI_OBS, PMU_2, 18, 1)
80 FIELD(IPI_ISR, PMU_2, 18, 1)
92 FIELD(IPI_IMR, PMU_2, 18, 1)
104 FIELD(IPI_IER, PMU_2, 18, 1)
116 FIELD(IPI_IDR, PMU_2, 18, 1)
135 int index_array[NUM_IPIS] = {0, 8, 9, 16, 17, 18, 19, 24, 25, 26, 27};
H A Dxlnx-pmu-iomod-intc.c91 FIELD(GPO3, PL_GPO_18, 18, 1)
122 FIELD(GPI0, RFT_LS_MISMATCH_23_A, 18, 1)
174 FIELD(GPI2, CP_ACPU2_RST_REQ, 18, 1)
199 FIELD(GPI3, PL_GPI_18, 18, 1)
231 FIELD(IRQ_STATUS, RTC_ALARM, 18, 1)
255 FIELD(IRQ_PENDING, RTC_ALARM, 18, 1)
279 FIELD(IRQ_ENABLE, RTC_ALARM, 18, 1)
303 FIELD(IRQ_ACK, RTC_ALARM, 18, 1)
/qemu/linux-user/ppc/
H A Dvdso.S109 .cfi_offset 18, 18 * sizeof_reg
145 .cfi_offset 50, offsetof_mcontext_fregs + 18 * sizeof_freg
204 save_vreg 18
/qemu/linux-user/loongarch64/
H A Dvdso.S75 .cfi_offset 18, B_GR + 18 * 8
109 .cfi_offset 50, B_FR + 18 * 8
/qemu/hw/display/
H A Dedid-generate.c184 if (desc + 18 + 18 < edid + 127) { in edid_desc_next()
185 return desc + 18; in edid_desc_next()
191 if (desc + 18 + 18 < dta + 127) { in edid_desc_next()
192 return desc + 18; in edid_desc_next()
371 stw_le_p(did + 18, 0xffff & (timings->xsync - 1)); in qemu_displayid_generate()
463 edid[18] = 1; in qemu_edid_generate()
/qemu/linux-user/riscv/
H A Dvdso.S133 .cfi_offset 18, B_GR + 18 * sizeof_reg
166 .cfi_offset 50, B_FR + 18 * sizeof_freg
/qemu/tests/tcg/tricore/asm/
H A Dtest_dextr.S24 TEST_D_DDI(dextr, 18, 0xde02468a, 0xabcdef01, 0x23456789, 17)
25 TEST_D_DDI(dextr, 19, 0xbc048d15, 0xabcdef01, 0x23456789, 18)
60 TEST_D_DDD(dextr, 52, 0xbc048d15, 0xabcdef01, 0x23456789, 18)
/qemu/tests/tcg/arm/
H A Dfcvt.ref40 18 SINGLE: 2.71828174591064453125e+00 / 0x402df854 (0 => OK)
41 18 HALF: 0x4170 (0x10 => INEXACT )
103 18 SINGLE: 2.71828174591064453125e+00 / 0x402df854 (0 => OK)
104 18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
166 18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
167 18 HALF: 0x01 (0 => OK)
249 18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
250 18 SINGLE: 1.00000000000000000000e+00 / 0x3f800000 (0 => OK)
403 18 SINGLE: 2.71828174591064453125e+00 / 0x402df854 (0 => OK)
404 18 HALF: 0x4170 (0x10 => INEXACT )
[all …]
/qemu/tests/tcg/aarch64/
H A Dfcvt.ref40 18 SINGLE: 2.71828174591064453125e+00 / 0x402df854 (0 => OK)
41 18 HALF: 0x4170 (0x10 => INEXACT )
103 18 SINGLE: 2.71828174591064453125e+00 / 0x402df854 (0 => OK)
104 18 DOUBLE: 2.71828174591064453125e+00 / 0x004005bf0a80000000 (0 => OK)
166 18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
167 18 HALF: 0x3c00 (0 => OK)
249 18 DOUBLE: 1.00000000000000000000e+00 / 0x003ff0000000000000 (0 => OK)
250 18 SINGLE: 1.00000000000000000000e+00 / 0x3f800000 (0 => OK)
403 18 SINGLE: 2.71828174591064453125e+00 / 0x402df854 (0 => OK)
404 18 HALF: 0x4170 (0x10 => INEXACT )
[all …]
/qemu/target/hexagon/
H A Darch.c74 {18, 22, 26, 30},
78 {14, 18, 21, 24},
81 {12, 15, 18, 21},
84 {11, 13, 15, 18},
102 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
114 16, 16, 18, 18, 19, 19, 21, 21, 22, 22,
/qemu/linux-user/alpha/
H A Dtarget_signal.h21 #define TARGET_SIGTSTP 18
84 #define TARGET_GEN_SUBRNG -18
/qemu/tests/functional/
H A Dtest_linux_initrd.py28 'releases/18/Fedora/x86_64/os/images/pxeboot/vmlinuz'),
40 Fedora-18 shipped with linux-3.6 which have not supported xloadflags

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