Home
last modified time | relevance | path

Searched +full:0 +full:xe (Results 1 – 25 of 1054) sorted by relevance

12345678910>>...43

/linux-6.8/drivers/gpu/drm/xe/compat-i915-headers/
Di915_drv.h9 * "Adaptation header" to allow i915 display to also build for xe driver.
10 * TODO: refactor i915 and xe so this can cease to exist
45 #define INTEL_JASPERLAKE 0
46 #define INTEL_ELKHARTLAKE 0
47 #define IS_PLATFORM(xe, x) ((xe)->info.platform == x) argument
50 #define IS_I830(dev_priv) (dev_priv && 0)
51 #define IS_I845G(dev_priv) (dev_priv && 0)
52 #define IS_I85X(dev_priv) (dev_priv && 0)
53 #define IS_I865G(dev_priv) (dev_priv && 0)
54 #define IS_I915G(dev_priv) (dev_priv && 0)
[all …]
/linux-6.8/drivers/gpu/drm/xe/
Dxe_display.c32 /* Xe device functions */
34 static bool has_display(struct xe_device *xe) in has_display() argument
36 return HAS_DISPLAY(xe); in has_display()
49 return 0; in xe_display_driver_probe_defer()
56 struct xe_device *xe = to_xe_device(dev); in xe_display_last_close() local
58 if (xe->info.enable_display) in xe_display_last_close()
79 static void unset_display_features(struct xe_device *xe) in unset_display_features() argument
81 xe->drm.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); in unset_display_features()
86 struct xe_device *xe = to_xe_device(dev); in display_destroy() local
88 destroy_workqueue(xe->display.hotplug.dp_wq); in display_destroy()
[all …]
Dxe_device.c53 struct xe_device *xe = to_xe_device(dev); in xe_file_open() local
70 xef->xe = xe; in xe_file_open()
78 spin_lock(&xe->clients.lock); in xe_file_open()
79 xe->clients.count++; in xe_file_open()
80 spin_unlock(&xe->clients.lock); in xe_file_open()
83 return 0; in xe_file_open()
88 struct xe_device *xe = to_xe_device(dev); in xe_file_close() local
109 spin_lock(&xe->clients.lock); in xe_file_close()
110 xe->clients.count--; in xe_file_close()
111 spin_unlock(&xe->clients.lock); in xe_file_close()
[all …]
Dxe_pm.c26 * DOC: Xe Power Management
28 * Xe PM shall be guided by the simplicity.
47 * @xe: xe device instance
49 * Return: 0 on success
51 int xe_pm_suspend(struct xe_device *xe) in xe_pm_suspend() argument
57 for_each_gt(gt, xe, id) in xe_pm_suspend()
61 err = xe_bo_evict_all(xe); in xe_pm_suspend()
65 xe_display_pm_suspend(xe); in xe_pm_suspend()
67 for_each_gt(gt, xe, id) { in xe_pm_suspend()
70 xe_display_pm_resume(xe); in xe_pm_suspend()
[all …]
Dxe_irq.c26 #define IMR(offset) XE_REG(offset + 0x4)
27 #define IIR(offset) XE_REG(offset + 0x8)
28 #define IER(offset) XE_REG(offset + 0xc)
34 if (val == 0) in assert_iir_is_zero()
38 "Interrupt register 0x%x is not zero: 0x%08x\n", in assert_iir_is_zero()
40 xe_mmio_write32(mmio, reg, 0xffffffff); in assert_iir_is_zero()
42 xe_mmio_write32(mmio, reg, 0xffffffff); in assert_iir_is_zero()
72 xe_mmio_write32(mmio, IMR(irqregs), ~0); in mask_and_disable()
76 xe_mmio_write32(mmio, IER(irqregs), 0); in mask_and_disable()
79 xe_mmio_write32(mmio, IIR(irqregs), ~0); in mask_and_disable()
[all …]
Dxe_display.h17 void xe_display_driver_remove(struct xe_device *xe);
19 int xe_display_create(struct xe_device *xe);
21 void xe_display_probe(struct xe_device *xe);
23 int xe_display_init_nommio(struct xe_device *xe);
24 int xe_display_init_noirq(struct xe_device *xe);
25 int xe_display_init_noaccel(struct xe_device *xe);
26 int xe_display_init(struct xe_device *xe);
27 void xe_display_fini(struct xe_device *xe);
29 void xe_display_register(struct xe_device *xe);
30 void xe_display_unregister(struct xe_device *xe);
[all …]
Dxe_pat.c17 #define _PAT_ATS 0x47fc
19 0x4800, 0x4804, \
20 0x4848, 0x484c)
21 #define _PAT_PTA 0x4820
28 #define XE2_COH_MODE REG_GENMASK(1, 0)
33 #define XELPG_PAT_0_WB REG_FIELD_PREP(XELPG_L4_POLICY_MASK, 0)
34 #define XELPG_INDEX_COH_MODE_MASK REG_GENMASK(1, 0)
37 #define XELPG_0_COH_NON REG_FIELD_PREP(XELPG_INDEX_COH_MODE_MASK, 0)
42 #define XELP_MEM_TYPE_MASK REG_GENMASK(1, 0)
46 #define XELP_PAT_UC REG_FIELD_PREP(XELP_MEM_TYPE_MASK, 0)
[all …]
Dxe_pci.c85 .rel = 0,
149 .has_flat_ccs = 0,
160 .has_flat_ccs = 0,
168 .has_usm = 0 /* FIXME: implementation missing */, \
185 .rel = 0,
233 static const u16 adls_rpls_ids[] = { XE_RPLS_IDS(NOP), 0 };
248 static const u16 adlp_rplu_ids[] = { XE_RPLU_IDS(NOP), 0 };
285 static const u16 dg2_g10_ids[] = { XE_DG2_G10_IDS(NOP), XE_ATS_M150_IDS(NOP), 0 };
286 static const u16 dg2_g11_ids[] = { XE_DG2_G11_IDS(NOP), XE_ATS_M75_IDS(NOP), 0 };
287 static const u16 dg2_g12_ids[] = { XE_DG2_G12_IDS(NOP), 0 };
[all …]
Dxe_ttm_stolen_mgr.c46 * @xe: xe device
52 bool xe_ttm_stolen_cpu_access_needs_ggtt(struct xe_device *xe) in xe_ttm_stolen_cpu_access_needs_ggtt() argument
54 return GRAPHICS_VERx100(xe) < 1270 && !IS_DGFX(xe); in xe_ttm_stolen_cpu_access_needs_ggtt()
57 static s64 detect_bar2_dgfx(struct xe_device *xe, struct xe_ttm_stolen_mgr *mgr) in detect_bar2_dgfx() argument
59 struct xe_tile *tile = xe_device_get_root_tile(xe); in detect_bar2_dgfx()
60 struct xe_gt *mmio = xe_root_mmio_gt(xe); in detect_bar2_dgfx()
61 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in detect_bar2_dgfx()
66 tile_offset = tile->mem.vram.io_start - xe->mem.vram.io_start; in detect_bar2_dgfx()
71 if (drm_WARN_ON(&xe->drm, tile_size < mgr->stolen_base)) in detect_bar2_dgfx()
72 return 0; in detect_bar2_dgfx()
[all …]
Dxe_mmio.c25 #define XEHP_MTCFG_ADDR XE_REG(0x101800)
31 _resize_bar(struct xe_device *xe, int resno, resource_size_t size) in _resize_bar() argument
33 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in _resize_bar()
42 …drm_info(&xe->drm, "Failed to resize BAR%d to %dM (%pe). Consider enabling 'Resizable BAR' support… in _resize_bar()
47 drm_info(&xe->drm, "BAR%d resized to %dM\n", resno, 1 << bar_size); in _resize_bar()
54 static void xe_resize_vram_bar(struct xe_device *xe) in xe_resize_vram_bar() argument
57 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); in xe_resize_vram_bar()
82 drm_info(&xe->drm, in xe_resize_vram_bar()
83 "Requested size: %lluMiB is not supported by rebar sizes: 0x%x. Leaving default: %lluMiB\n", in xe_resize_vram_bar()
100 drm_info(&xe->drm, "Attempting to resize bar from %lluMiB -> %lluMiB\n", in xe_resize_vram_bar()
[all …]
Dxe_bo_evict.c16 * @xe: xe device
27 int xe_bo_evict_all(struct xe_device *xe) in xe_bo_evict_all() argument
29 struct ttm_device *bdev = &xe->ttm; in xe_bo_evict_all()
37 if (!IS_DGFX(xe)) in xe_bo_evict_all()
38 return 0; in xe_bo_evict_all()
54 spin_lock(&xe->pinned.lock); in xe_bo_evict_all()
56 bo = list_first_entry_or_null(&xe->pinned.external_vram, in xe_bo_evict_all()
62 spin_unlock(&xe->pinned.lock); in xe_bo_evict_all()
69 spin_lock(&xe->pinned.lock); in xe_bo_evict_all()
71 &xe->pinned.external_vram); in xe_bo_evict_all()
[all …]
Dxe_device.h40 int xe_device_probe_early(struct xe_device *xe);
41 int xe_device_probe(struct xe_device *xe);
42 void xe_device_remove(struct xe_device *xe);
43 void xe_device_shutdown(struct xe_device *xe);
45 void xe_device_wmb(struct xe_device *xe);
52 static inline struct xe_tile *xe_device_get_root_tile(struct xe_device *xe) in xe_device_get_root_tile() argument
54 return &xe->tiles[0]; in xe_device_get_root_tile()
62 gt_id = 0; in xe_tile_get_gt()
67 static inline struct xe_gt *xe_device_get_gt(struct xe_device *xe, u8 gt_id) in xe_device_get_gt() argument
69 struct xe_tile *root_tile = xe_device_get_root_tile(xe); in xe_device_get_gt()
[all …]
Dxe_debugfs.c35 struct xe_device *xe = node_to_xe(m->private); in info() local
40 drm_printf(&p, "graphics_verx100 %d\n", xe->info.graphics_verx100); in info()
41 drm_printf(&p, "media_verx100 %d\n", xe->info.media_verx100); in info()
43 xe_step_name(xe->info.step.graphics), in info()
44 xe_step_name(xe->info.step.media), in info()
45 xe_step_name(xe->info.step.display), in info()
46 xe_step_name(xe->info.step.basedie)); in info()
47 drm_printf(&p, "is_dgfx %s\n", str_yes_no(xe->info.is_dgfx)); in info()
48 drm_printf(&p, "platform %d\n", xe->info.platform); in info()
50 xe->info.subplatform > XE_SUBPLATFORM_NONE ? xe->info.subplatform : 0); in info()
[all …]
Dxe_exec_queue.c27 XE_EXEC_QUEUE_JOB_TIMEOUT = 0,
33 static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe, in __xe_exec_queue_create() argument
84 for (i = 0; i < width; ++i) { in __xe_exec_queue_create()
103 drm_WARN_ON(&xe->drm, !xe_device_mem_access_get_if_ongoing(xe)); in __xe_exec_queue_create()
108 for (i = i - 1; i >= 0; --i) in __xe_exec_queue_create()
114 struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm, in xe_exec_queue_create() argument
126 q = __xe_exec_queue_create(xe, vm, logical_mask, width, hwe, flags); in xe_exec_queue_create()
133 struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt, in xe_exec_queue_create_class() argument
139 u32 logical_mask = 0; in xe_exec_queue_create_class()
155 return xe_exec_queue_create(xe, vm, logical_mask, 1, hwe0, flags); in xe_exec_queue_create_class()
[all …]
Dxe_heci_gsc.c16 #define GSC_BAR_LENGTH 0x00000FFC
18 #define DG1_GSC_HECI2_BASE 0x259000
19 #define PVC_GSC_HECI2_BASE 0x285000
20 #define DG2_GSC_HECI2_BASE 0x374000
91 void xe_heci_gsc_fini(struct xe_device *xe) in xe_heci_gsc_fini() argument
93 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; in xe_heci_gsc_fini()
95 if (!HAS_HECI_GSCFI(xe)) in xe_heci_gsc_fini()
106 if (heci_gsc->irq >= 0) in xe_heci_gsc_fini()
111 static int heci_gsc_irq_setup(struct xe_device *xe) in heci_gsc_irq_setup() argument
113 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; in heci_gsc_irq_setup()
[all …]
Dxe_query.c41 static size_t calc_hw_engine_info_size(struct xe_device *xe) in calc_hw_engine_info_size() argument
47 int i = 0; in calc_hw_engine_info_size()
49 for_each_gt(gt, xe, gt_id) in calc_hw_engine_info_size()
92 u32 upper, lower, old_upper, loop = 0; in __read_timestamps()
108 query_engine_cycles(struct xe_device *xe, in query_engine_cycles() argument
119 if (query->size == 0) { in query_engine_cycles()
121 return 0; in query_engine_cycles()
122 } else if (XE_IOCTL_DBG(xe, query->size != size)) { in query_engine_cycles()
138 gt = xe_device_get_gt(xe, eci->gt_id); in query_engine_cycles()
150 xe_device_mem_access_get(xe); in query_engine_cycles()
[all …]
Dxe_rtp.c26 static bool has_samedia(const struct xe_device *xe) in has_samedia() argument
28 return xe->info.media_verx100 >= 1300; in has_samedia()
31 static bool rule_matches(const struct xe_device *xe, in rule_matches() argument
41 for (r = rules, i = 0; i < n_rules; r = &rules[++i]) { in rule_matches()
44 match = xe->info.platform == r->platform; in rule_matches()
47 match = xe->info.platform == r->platform && in rule_matches()
48 xe->info.subplatform == r->subplatform; in rule_matches()
51 match = xe->info.graphics_verx100 == r->ver_start && in rule_matches()
52 (!has_samedia(xe) || !xe_gt_is_media_type(gt)); in rule_matches()
55 match = xe->info.graphics_verx100 >= r->ver_start && in rule_matches()
[all …]
Dxe_bo.c40 .fpfn = 0,
41 .lpfn = 0,
43 .flags = 0,
54 .fpfn = 0,
55 .lpfn = 0,
57 .flags = 0,
72 static bool resource_is_stolen_vram(struct xe_device *xe, struct ttm_resource *res) in resource_is_stolen_vram() argument
74 return res->mem_type == XE_PL_STOLEN && IS_DGFX(xe); in resource_is_stolen_vram()
114 mem_type_to_migrate(struct xe_device *xe, u32 mem_type) in mem_type_to_migrate() argument
118 xe_assert(xe, mem_type == XE_PL_STOLEN || mem_type_is_vram(mem_type)); in mem_type_to_migrate()
[all …]
Dxe_step.c46 [0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_B0 },
51 [0] = { COMMON_STEP(A0) },
56 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 },
57 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A2 },
58 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display = STEP_B0 },
59 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_B0 },
60 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display = STEP_C0 },
64 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display = STEP_D0 },
65 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display = STEP_C0 },
69 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 },
[all …]
Dxe_huc.c54 struct xe_device *xe = gt_to_xe(gt); in huc_alloc_gsc_pkt() local
59 bo = xe_bo_create_pin_map(xe, gt_to_tile(gt), NULL, in huc_alloc_gsc_pkt()
69 err = drmm_add_action_or_reset(&xe->drm, free_gsc_pkt, huc); in huc_alloc_gsc_pkt()
71 free_gsc_pkt(&xe->drm, huc); in huc_alloc_gsc_pkt()
75 return 0; in huc_alloc_gsc_pkt()
82 struct xe_device *xe = gt_to_xe(gt); in xe_huc_init() local
90 return 0; in xe_huc_init()
98 return 0; in xe_huc_init()
108 return 0; in xe_huc_init()
111 drm_err(&xe->drm, "HuC init failed with %d", ret); in xe_huc_init()
[all …]
Dxe_vm.c55 * Return: 0 if userptr vma is valid, -EAGAIN otherwise; repin recommended.
61 -EAGAIN : 0; in xe_vma_userptr_check_repin()
69 struct xe_device *xe = vm->xe; in xe_vma_userptr_pin_pages() local
78 xe_assert(xe, xe_vma_is_userptr(vma)); in xe_vma_userptr_pin_pages()
81 return 0; in xe_vma_userptr_pin_pages()
85 return 0; in xe_vma_userptr_pin_pages()
92 dma_unmap_sgtable(xe->drm.dev, in xe_vma_userptr_pin_pages()
95 DMA_BIDIRECTIONAL, 0); in xe_vma_userptr_pin_pages()
100 pinned = ret = 0; in xe_vma_userptr_pin_pages()
113 read_only ? 0 : FOLL_WRITE, in xe_vma_userptr_pin_pages()
[all …]
/linux-6.8/drivers/gpu/drm/xe/tests/
Dxe_migrate.c14 static bool sanity_fence_failed(struct xe_device *xe, struct dma_fence *fence, in sanity_fence_failed() argument
28 if (ret <= 0) { in sanity_fence_failed()
36 static int run_sanity_job(struct xe_migrate *m, struct xe_device *xe, in run_sanity_job() argument
40 u64 batch_base = xe_migrate_batch_base(m, xe->info.has_usm); in run_sanity_job()
56 if (sanity_fence_failed(xe, fence, str, test)) in run_sanity_job()
61 return 0; in run_sanity_job()
76 for (i = 0; i < num_qwords; i++) { in sanity_populate_cb()
77 value = (qword_ofs + i - update->ofs) * 0x1111111111111111ULL; in sanity_populate_cb()
99 } } while (0)
104 struct xe_device *xe = tile_to_xe(m->tile); in test_copy() local
[all …]
/linux-6.8/Documentation/ABI/testing/
Dsysfs-driver-intel-xe-hwmon1 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max
4 Contact: intel-xe@lists.freedesktop.org
9 exceeds this limit. A read value of 0 means that the PL1
10 power limit is disabled, writing 0 disables the
11 limit. Writing values > 0 and <= TDP will enable the power limit.
13 Only supported for particular Intel xe graphics platforms.
15 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
18 Contact: intel-xe@lists.freedesktop.org
21 Only supported for particular Intel xe graphics platforms.
23 What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
[all …]
/linux-6.8/drivers/pinctrl/sunxi/
Dpinctrl-sun20i-d1.c18 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
19 SUNXI_FUNCTION(0x0, "gpio_in"),
20 SUNXI_FUNCTION(0x1, "gpio_out"),
21 SUNXI_FUNCTION(0x2, "pwm3"),
22 SUNXI_FUNCTION(0x3, "ir"), /* TX */
23 SUNXI_FUNCTION(0x4, "i2c2"), /* SCK */
24 SUNXI_FUNCTION(0x5, "spi1"), /* WP */
25 SUNXI_FUNCTION(0x6, "uart0"), /* TX */
26 SUNXI_FUNCTION(0x7, "uart2"), /* TX */
27 SUNXI_FUNCTION(0x8, "spdif"), /* OUT */
[all …]
/linux-6.8/drivers/gpu/drm/amd/include/asic_reg/umc/
Dumc_6_7_0_sh_mask.h29 …C_UMC0_MCUMC_STATUST0__ErrorCode__SHIFT 0x0
30 …_UMC0_MCUMC_STATUST0__ErrorCodeExt__SHIFT 0x10
31 …_UMC0_MCUMC_STATUST0__RESERV22__SHIFT 0x16
32 …_UMC0_MCUMC_STATUST0__AddrLsb__SHIFT 0x18
33 …_UMC0_MCUMC_STATUST0__RESERV30__SHIFT 0x1e
34 …_UMC0_MCUMC_STATUST0__ErrCoreId__SHIFT 0x20
35 …_UMC0_MCUMC_STATUST0__RESERV38__SHIFT 0x26
36 …_UMC0_MCUMC_STATUST0__Scrub__SHIFT 0x28
37 …_UMC0_MCUMC_STATUST0__RESERV41__SHIFT 0x29
38 …_UMC0_MCUMC_STATUST0__Poison__SHIFT 0x2b
[all …]

12345678910>>...43