Lines Matching +full:0 +full:xe
9 * "Adaptation header" to allow i915 display to also build for xe driver.
10 * TODO: refactor i915 and xe so this can cease to exist
45 #define INTEL_JASPERLAKE 0
46 #define INTEL_ELKHARTLAKE 0
47 #define IS_PLATFORM(xe, x) ((xe)->info.platform == x) argument
50 #define IS_I830(dev_priv) (dev_priv && 0)
51 #define IS_I845G(dev_priv) (dev_priv && 0)
52 #define IS_I85X(dev_priv) (dev_priv && 0)
53 #define IS_I865G(dev_priv) (dev_priv && 0)
54 #define IS_I915G(dev_priv) (dev_priv && 0)
55 #define IS_I915GM(dev_priv) (dev_priv && 0)
56 #define IS_I945G(dev_priv) (dev_priv && 0)
57 #define IS_I945GM(dev_priv) (dev_priv && 0)
58 #define IS_I965G(dev_priv) (dev_priv && 0)
59 #define IS_I965GM(dev_priv) (dev_priv && 0)
60 #define IS_G45(dev_priv) (dev_priv && 0)
61 #define IS_GM45(dev_priv) (dev_priv && 0)
62 #define IS_G4X(dev_priv) (dev_priv && 0)
63 #define IS_PINEVIEW(dev_priv) (dev_priv && 0)
64 #define IS_G33(dev_priv) (dev_priv && 0)
65 #define IS_IRONLAKE(dev_priv) (dev_priv && 0)
66 #define IS_IRONLAKE_M(dev_priv) (dev_priv && 0)
67 #define IS_SANDYBRIDGE(dev_priv) (dev_priv && 0)
68 #define IS_IVYBRIDGE(dev_priv) (dev_priv && 0)
69 #define IS_IVB_GT1(dev_priv) (dev_priv && 0)
70 #define IS_VALLEYVIEW(dev_priv) (dev_priv && 0)
71 #define IS_CHERRYVIEW(dev_priv) (dev_priv && 0)
72 #define IS_HASWELL(dev_priv) (dev_priv && 0)
73 #define IS_BROADWELL(dev_priv) (dev_priv && 0)
74 #define IS_SKYLAKE(dev_priv) (dev_priv && 0)
75 #define IS_BROXTON(dev_priv) (dev_priv && 0)
76 #define IS_KABYLAKE(dev_priv) (dev_priv && 0)
77 #define IS_GEMINILAKE(dev_priv) (dev_priv && 0)
78 #define IS_COFFEELAKE(dev_priv) (dev_priv && 0)
79 #define IS_COMETLAKE(dev_priv) (dev_priv && 0)
80 #define IS_ICELAKE(dev_priv) (dev_priv && 0)
81 #define IS_JASPERLAKE(dev_priv) (dev_priv && 0)
82 #define IS_ELKHARTLAKE(dev_priv) (dev_priv && 0)
88 #define IS_XEHPSDV(dev_priv) (dev_priv && 0)
94 #define IS_HASWELL_ULT(dev_priv) (dev_priv && 0)
95 #define IS_BROADWELL_ULT(dev_priv) (dev_priv && 0)
96 #define IS_BROADWELL_ULX(dev_priv) (dev_priv && 0)
100 #define INTEL_DISPLAY_ENABLED(xe) (HAS_DISPLAY((xe)) && !intel_opregion_headless_sku((xe))) argument
102 #define IS_GRAPHICS_VER(xe, first, last) \ argument
103 ((xe)->info.graphics_verx100 >= first * 100 && \
104 (xe)->info.graphics_verx100 <= (last*100 + 99))
105 #define IS_MOBILE(xe) (xe && 0) argument
106 #define HAS_LLC(xe) (!IS_DGFX((xe))) argument
108 #define HAS_GMD_ID(xe) GRAPHICS_VERx100(xe) >= 1270 argument
111 #define IS_DISPLAY_STEP(xe, first, last) ({u8 __step = (xe)->info.step.display; first <= __step && … argument
112 #define IS_GRAPHICS_STEP(xe, first, last) ({u8 __step = (xe)->info.step.graphics; first <= __step &… argument
114 #define IS_LP(xe) (0) argument
115 #define IS_GEN9_LP(xe) (0) argument
116 #define IS_GEN9_BC(xe) (0) argument
118 #define IS_TIGERLAKE_UY(xe) (xe && 0) argument
119 #define IS_COMETLAKE_ULX(xe) (xe && 0) argument
120 #define IS_COFFEELAKE_ULX(xe) (xe && 0) argument
121 #define IS_KABYLAKE_ULX(xe) (xe && 0) argument
122 #define IS_SKYLAKE_ULX(xe) (xe && 0) argument
123 #define IS_HASWELL_ULX(xe) (xe && 0) argument
124 #define IS_COMETLAKE_ULT(xe) (xe && 0) argument
125 #define IS_COFFEELAKE_ULT(xe) (xe && 0) argument
126 #define IS_KABYLAKE_ULT(xe) (xe && 0) argument
127 #define IS_SKYLAKE_ULT(xe) (xe && 0) argument
129 #define IS_DG1_GRAPHICS_STEP(xe, first, last) (IS_DG1(xe) && IS_GRAPHICS_STEP(xe, first, last)) argument
130 #define IS_DG2_GRAPHICS_STEP(xe, variant, first, last) \ argument
131 ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_ ## variant && \
132 IS_GRAPHICS_STEP(xe, first, last))
133 #define IS_XEHPSDV_GRAPHICS_STEP(xe, first, last) (IS_XEHPSDV(xe) && IS_GRAPHICS_STEP(xe, first, la… argument
136 #define IS_PVC_BD_STEP(xe, first, last) (!WARN_ON(1) && IS_PONTEVECCHIO(xe)) argument
138 #define IS_TIGERLAKE_DISPLAY_STEP(xe, first, last) (IS_TIGERLAKE(xe) && IS_DISPLAY_STEP(xe, first, … argument
139 #define IS_ROCKETLAKE_DISPLAY_STEP(xe, first, last) (IS_ROCKETLAKE(xe) && IS_DISPLAY_STEP(xe, first… argument
140 #define IS_DG1_DISPLAY_STEP(xe, first, last) (IS_DG1(xe) && IS_DISPLAY_STEP(xe, first, last)) argument
141 #define IS_DG2_DISPLAY_STEP(xe, first, last) (IS_DG2(xe) && IS_DISPLAY_STEP(xe, first, last)) argument
142 #define IS_ADLP_DISPLAY_STEP(xe, first, last) (IS_ALDERLAKE_P(xe) && IS_DISPLAY_STEP(xe, first, las… argument
143 #define IS_ADLS_DISPLAY_STEP(xe, first, last) (IS_ALDERLAKE_S(xe) && IS_DISPLAY_STEP(xe, first, las… argument
144 #define IS_JSL_EHL_DISPLAY_STEP(xe, first, last) (IS_JSL_EHL(xe) && IS_DISPLAY_STEP(xe, first, last… argument
145 #define IS_MTL_DISPLAY_STEP(xe, first, last) (IS_METEORLAKE(xe) && IS_DISPLAY_STEP(xe, first, last)) argument
148 #define IS_MTL_GRAPHICS_STEP(xe, sub, first, last) (IS_METEORLAKE(xe) && IS_DISPLAY_STEP(xe, first,… argument
150 #define IS_DG2_G10(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G10) argument
151 #define IS_DG2_G11(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G11) argument
152 #define IS_DG2_G12(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_DG2_G12) argument
153 #define IS_RAPTORLAKE_U(xe) ((xe)->info.subplatform == XE_SUBPLATFORM_ALDERLAKE_P_RPLU) argument
154 #define IS_ICL_WITH_PORT_F(xe) (xe && 0) argument
155 #define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe)) argument
157 #define mkwrite_device_info(xe) (INTEL_INFO(xe)) argument
159 #define HAS_128_BYTE_Y_TILING(xe) (xe || 1) argument
161 #define intel_has_gpu_reset(a) (a && 0)
167 struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm); in intel_runtime_pm_get() local
169 if (xe_pm_runtime_get(xe) < 0) { in intel_runtime_pm_get()
170 xe_pm_runtime_put(xe); in intel_runtime_pm_get()
178 struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm); in intel_runtime_pm_get_if_in_use() local
180 return xe_pm_runtime_get_if_active(xe); in intel_runtime_pm_get_if_in_use()
185 struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm); in intel_runtime_pm_put_unchecked() local
187 xe_pm_runtime_put(xe); in intel_runtime_pm_put_unchecked()
198 #define assert_rpm_wakelock_held(x) do { } while (0)
199 #define assert_rpm_raw_wakeref_held(x) do { } while (0)
201 #define intel_uncore_forcewake_get(x, y) do { } while (0)
202 #define intel_uncore_forcewake_put(x, y) do { } while (0)
204 #define intel_uncore_arm_unclaimed_mmio_detection(x) do { } while (0)
206 #define I915_PRIORITY_DISPLAY 0
210 #define i915_gem_fence_wait_priority(fence, attr) do { (void) attr; } while (0)
214 intel_runtime_pm_put((rpm), (wf)), (wf) = 0)
217 #define RUNTIME_INFO(xe) (&(xe)->info.i915_runtime) argument