Home
last modified time | relevance | path

Searched +full:0 +full:x900000 (Results 1 – 24 of 24) sorted by relevance

/linux-5.10/Documentation/devicetree/bindings/pci/
Dxgene-pci-msi.txt8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
[all …]
/linux-5.10/arch/arm/boot/dts/
Dopenbmc-flash-layout-128.dtsi8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
Darmada-385-linksys-cobra.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
Darmada-385-linksys-shelby.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
Darmada-385-linksys-caiman.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
Dpm9g45.dts19 reg = <0x70000000 0x8000000>;
40 pinctrl_nand_rb: nand-rb-0 {
55 timer@0 {
57 reg = <0>, <1>;
67 pinctrl-0 = <
73 slot@0 {
74 reg = <0>;
91 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
95 reg = <0x3 0x0 0x800000>;
108 at91bootstrap@0 {
[all …]
Daspeed-ast2600-evb.dts22 reg = <0x80000000 0x80000000>;
29 ethphy1: ethernet-phy@0 {
31 reg = <0>;
38 ethphy2: ethernet-phy@0 {
40 reg = <0>;
47 ethphy3: ethernet-phy@0 {
49 reg = <0>;
60 pinctrl-0 = <&pinctrl_rgmii2_default>;
70 pinctrl-0 = <&pinctrl_rgmii3_default>;
80 pinctrl-0 = <&pinctrl_rgmii4_default>;
[all …]
Dox810se.dtsi17 #address-cells = <0>;
18 #size-cells = <0>;
29 /* Max 256MB @ 0x48000000 */
30 reg = <0x48000000 0x10000000>;
36 #clock-cells = <0>;
42 #clock-cells = <0>;
48 #clock-cells = <0>;
56 #clock-cells = <0>;
62 #clock-cells = <0>;
70 #clock-cells = <0>;
[all …]
Darmada-xp-linksys-mamba.dts6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
34 memory@0 {
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
64 pinctrl-0 = <&ge0_rgmii_pins>;
69 bm,pool-long = <0>;
[all …]
Dqcom-msm8960.dtsi18 #size-cells = <0>;
19 interrupts = <1 14 0x304>;
21 cpu@0 {
25 reg = <0>;
49 reg = <0x0 0x0>;
54 interrupts = <1 10 0x304>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
91 reg = <0x02000000 0x1000>,
[all …]
Dqcom-mdm9615.dtsi63 #size-cells = <0>;
65 cpu0: cpu@0 {
80 #clock-cells = <0>;
103 reg = <0x02040000 0x1000>;
104 arm,data-latency = <2 2 0>;
113 reg = <0x02000000 0x1000>,
114 <0x02002000 0x1000>;
122 reg = <0x0200a000 0x100>;
125 cpu-offset = <0x80000>;
131 gpio-ranges = <&msmgpio 0 0 88>;
[all …]
Dqcom-msm8660.dtsi18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0>;
44 reg = <0x0 0x0>;
49 interrupts = <1 9 0x304>;
55 #clock-cells = <0>;
61 #clock-cells = <0>;
67 #clock-cells = <0>;
79 io-channels = <&xoadc 0x00 0x01>, /* Battery */
80 <&xoadc 0x00 0x02>, /* DC in (charger) */
[all …]
/linux-5.10/arch/arm/include/uapi/asm/
Dunistd.h17 #define __NR_OABI_SYSCALL_BASE 0x900000
20 #define __NR_SYSCALL_BASE 0
33 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Doxnas,pinctrl.txt45 reg = <0x900000 0x100000>;
48 reg-shift = <0>;
55 pinctrl-0 = <&pinctrl_uart2>;
/linux-5.10/Documentation/devicetree/bindings/clock/
Dqcom,gcc.yaml87 reg = <0x900000 0x4000>;
/linux-5.10/Documentation/devicetree/bindings/phy/
Dti,phy-am654-serdes.txt12 0 - USB3
16 0 - PCIe1 Lane0
62 reg = <0x0 0x900000 0x0 0x2000>;
73 mux-controls = <&serdes_mux 0>;
/linux-5.10/sound/drivers/vx/
Dvx_cmd.c19 [CMD_VERSION] = { 0x010000, 2, RMH_SSIZE_FIXED, 1 },
20 [CMD_SUPPORTED] = { 0x020000, 1, RMH_SSIZE_FIXED, 2 },
21 [CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED, 1 },
22 [CMD_SEND_IRQA] = { 0x070001, 1, RMH_SSIZE_FIXED, 0 },
23 [CMD_IBL] = { 0x080000, 1, RMH_SSIZE_FIXED, 4 },
24 [CMD_ASYNC] = { 0x0A0000, 1, RMH_SSIZE_ARG, 0 },
25 [CMD_RES_PIPE] = { 0x400000, 1, RMH_SSIZE_FIXED, 0 },
26 [CMD_FREE_PIPE] = { 0x410000, 1, RMH_SSIZE_FIXED, 0 },
27 [CMD_CONF_PIPE] = { 0x42A101, 2, RMH_SSIZE_FIXED, 0 },
28 [CMD_ABORT_CONF_PIPE] = { 0x42A100, 2, RMH_SSIZE_FIXED, 0 },
[all …]
/linux-5.10/drivers/pci/controller/
Dpcie-rockchip.h29 #define PCIE_CLIENT_BASE 0x0
30 #define PCIE_CLIENT_CONFIG (PCIE_CLIENT_BASE + 0x00)
31 #define PCIE_CLIENT_CONF_ENABLE HIWORD_UPDATE_BIT(0x0001)
32 #define PCIE_CLIENT_CONF_DISABLE HIWORD_UPDATE(0x0001, 0)
33 #define PCIE_CLIENT_LINK_TRAIN_ENABLE HIWORD_UPDATE_BIT(0x0002)
34 #define PCIE_CLIENT_ARI_ENABLE HIWORD_UPDATE_BIT(0x0008)
35 #define PCIE_CLIENT_CONF_LANE_NUM(x) HIWORD_UPDATE(0x0030, ENCODE_LANES(x))
36 #define PCIE_CLIENT_MODE_RC HIWORD_UPDATE_BIT(0x0040)
37 #define PCIE_CLIENT_MODE_EP HIWORD_UPDATE(0x0040, 0)
38 #define PCIE_CLIENT_GEN_SEL_1 HIWORD_UPDATE(0x0080, 0)
[all …]
/linux-5.10/drivers/net/wireless/ath/wil6210/
Dwmi.c21 int agg_wsize; /* = 0; */
24 " 0 - use default; < 0 - don't auto-establish");
29 " 60G device led enablement. Set the led ID (0-2) to enable");
62 * AHB addresses starting from 0x880000
75 * 0x880000 .. 0xa80000 2Mb BAR0
76 * 0x800000 .. 0x808000 0x900000 .. 0x908000 32k DCCM
77 * 0x840000 .. 0x860000 0x908000 .. 0x928000 128k PERIPH
81 {0x000000, 0x040000, 0x8c0000, "fw_code", true, true},
83 {0x800000, 0x808000, 0x900000, "fw_data", true, true},
85 {0x840000, 0x860000, 0x908000, "fw_peri", true, true},
[all …]
/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray.dtsi43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
64 reg = <0x0 0x100>;
72 reg = <0x0 0x101>;
80 reg = <0x0 0x200>;
88 reg = <0x0 0x201>;
96 reg = <0x0 0x300>;
104 reg = <0x0 0x301>;
[all …]
/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h15 #define RVU_AF_MSIXTR_BASE (0x10)
16 #define RVU_AF_ECO (0x20)
17 #define RVU_AF_BLK_RST (0x30)
18 #define RVU_AF_PF_BAR4_ADDR (0x40)
19 #define RVU_AF_RAS (0x100)
20 #define RVU_AF_RAS_W1S (0x108)
21 #define RVU_AF_RAS_ENA_W1S (0x110)
22 #define RVU_AF_RAS_ENA_W1C (0x118)
23 #define RVU_AF_GEN_INT (0x120)
24 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>; /* GICR */
47 reg = <0x00 0x01820000 0x00 0x10000>;
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
[all …]
/linux-5.10/arch/arm64/boot/dts/apm/
Dapm-storm.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
29 reg = <0x0 0x001>;
31 cpu-release-addr = <0x1 0x0000fff8>;
37 reg = <0x0 0x100>;
39 cpu-release-addr = <0x1 0x0000fff8>;
45 reg = <0x0 0x101>;
47 cpu-release-addr = <0x1 0x0000fff8>;
[all …]
/linux-5.10/drivers/pinctrl/qcom/
Dpinctrl-msm8998.c13 #define NORTH 0x500000
14 #define WEST 0x100000
15 #define EAST 0x900000
42 .ctl_reg = base + 0x1000 * id, \
43 .io_reg = base + 0x4 + 0x1000 * id, \
44 .intr_cfg_reg = base + 0x8 + 0x1000 * id, \
45 .intr_status_reg = base + 0xc + 0x1000 * id, \
46 .intr_target_reg = base + 0x8 + 0x1000 * id, \
48 .pull_bit = 0, \
51 .in_bit = 0, \
[all …]