| /linux/arch/sh/boards/mach-kfr2r09/ |
| H A D | setup.c | 49 #define DRVCRB 0xA405018C
55 .offset = 0,
73 [0] = {
75 .start = 0x00000000,
76 .end = 0x03ffffff,
91 [0] = {
93 .start = 0x10000000,
94 .end = 0x1001ffff,
111 KEY_1, KEY_2, KEY_3, 0, KEY_UP,
112 KEY_4, KEY_5, KEY_6, 0, KEY_LEF
[all...] |
| /linux/drivers/net/ethernet/atheros/atl1e/ |
| H A D | atl1e.h | 43 #define PCI_REG_COMMAND 0x04 /* PCI Command Register */
44 #define CMD_IO_SPACE 0x0001
45 #define CMD_MEMORY_SPACE 0x0002
46 #define CMD_BUS_MASTER 0x0004
48 #define BAR_0 0
53 #define AT_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
54 #define AT_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
55 #define AT_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
56 #define AT_WUFC_MC 0x00000008 /* Multicast Wakeup Enable */
57 #define AT_WUFC_BC 0x0000001
[all...] |
| H A D | atl1e_hw.c | 17 * return 0 if eeprom exist
29 return ((value & 0xFF00) == 0x6C00) ? 0 : 1; in atl1e_check_eeprom_exist()
36 * 00-0B-6A-F6-00-DC in atl1e_hw_set_mac_addr()
37 * 0: 6AF600DC 1: 000B in atl1e_hw_set_mac_addr()
44 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); in atl1e_hw_set_mac_addr()
46 value = (((u32)hw->mac_addr[0]) << 8) | in atl1e_hw_set_mac_addr()
53 * return 0 if get valid mac address,
63 return 0; in atl1e_get_permanent_address()
[all...] |
| /linux/arch/mips/include/asm/ |
| H A D | mips-cm.h | 28 * global control block, or 0 if no Coherence Manager is present. It provides
58 * It's set to 0 for 32-bit accesses and 1 for 64-bit accesses.
84 * Attempt to detect the presence of a Coherence Manager. Returns 0 if a CM
137 #define MIPS_CM_GCB_OFS 0x0000 /* Global Control Block */
138 #define MIPS_CM_CLCB_OFS 0x2000 /* Core Local Control Block */
139 #define MIPS_CM_COCB_OFS 0x4000 /* Core Other Control Block */
140 #define MIPS_CM_GDB_OFS 0x6000 /* Global Debug Block */
143 #define MIPS_CM_GCR_SIZE 0x8000
146 #define MIPS_CM_L2SYNC_SIZE 0x100
[all...] |
| /linux/include/uapi/linux/ |
| H A D | input.h | 53 #define EV_VERSION 0x010001
56 * IOCTLs (0x00 - 0x7f)
74 * joydev interface and reported as 0 instead.
118 #define INPUT_KEYMAP_BY_INDEX (1 << 0)
132 #define EVIOCGVERSION _IOR('E', 0x01, int) /* get driver version */
133 #define EVIOCGID _IOR('E', 0x02, struct input_id) /* get device ID */
134 #define EVIOCGREP _IOR('E', 0x03, unsigned int[2]) /* get repeat settings */
135 #define EVIOCSREP _IOW('E', 0x03, unsigned int[2]) /* set repeat settings */
137 #define EVIOCGKEYCODE _IOR('E', 0x0
[all...] |
| H A D | nilfs2_ondisk.h | 67 #define i_device_code i_bmap[0]
96 ((unsigned long)&((struct nilfs_super_root *)0)->sr_dat + \
98 #define NILFS_SR_DAT_OFFSET(inode_size) NILFS_SR_MDT_OFFSET(inode_size, 0)
111 #define NILFS_VALID_FS 0x0001 /* Unmounted cleanly */
112 #define NILFS_ERROR_FS 0x0002 /* Errors detected */
113 #define NILFS_RESIZE_FS 0x0004 /* Resize required */
118 #define NILFS_MOUNT_ERROR_MODE 0x0070 /* Error mode mask */
119 #define NILFS_MOUNT_ERRORS_CONT 0x0010 /* Continue on errors */
120 #define NILFS_MOUNT_ERRORS_RO 0x0020 /* Remount fs ro on errors */
121 #define NILFS_MOUNT_ERRORS_PANIC 0x004
[all...] |
| /linux/arch/m68k/ifpsp060/src/ |
| H A D | fpsp.S | 43 set _off_bsun, 0x00
44 set _off_snan, 0x04
45 set _off_operr, 0x08
46 set _off_ovfl, 0x0c
47 set _off_unfl, 0x10
48 set _off_dz, 0x14
49 set _off_inex, 0x18
50 set _off_fline, 0x1c
51 set _off_fpu_dis, 0x20
52 set _off_trap, 0x2
[all...] |
| /linux/sound/soc/codecs/ |
| H A D | cs42l42-sdw.c | 29 #define CS42L42_SDW_ADDR_OFFSET 0x8000
31 #define CS42L42_SDW_MEM_ACCESS_STATUS 0xd0
32 #define CS42L42_SDW_MEM_READ_DATA 0xd8
36 #define CS42L42_SDW_RDATA_RDY BIT(0)
60 return 0; in cs42l42_sdw_dai_startup()
69 struct sdw_stream_config stream_config = {0}; in cs42l42_sdw_dai_hw_params()
70 struct sdw_port_config port_config = {0}; in cs42l42_sdw_dai_hw_params()
95 return 0; in cs42l42_sdw_dai_hw_params()
124 cs42l42->sample_rate = 0; in cs42l42_sdw_dai_hw_free()
[all...] |
| H A D | rt5670.c | 33 #define RT5670_GPIO1_IS_IRQ BIT(0)
52 #define RT5670_DEVICE_ID 0x6271
54 #define RT5670_PR_RANGE_BASE (0xff + 1)
55 #define RT5670_PR_SPACING 0x100
57 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
61 .range_max = RT5670_PR_BASE + 0xf8,
63 .selector_mask = 0xff,
64 .selector_shift = 0x0,
66 .window_len = 0x1, },
70 { RT5670_PR_BASE + 0x1
[all...] |
| H A D | alc5632.c | 36 { 2, 0x8080 }, /* R2 - Speaker Output Volume */
37 { 4, 0x8080 }, /* R4 - Headphone Output Volume */
38 { 6, 0x8080 }, /* R6 - AUXOUT Volume */
39 { 8, 0xC800 }, /* R8 - Phone Input */
40 { 10, 0xE808 }, /* R10 - LINE_IN Volume */
41 { 12, 0x1010 }, /* R12 - STEREO DAC Input Volume */
42 { 14, 0x0808 }, /* R14 - MIC Input Volume */
43 { 16, 0xEE0F }, /* R16 - Stereo DAC and MIC Routing Control */
44 { 18, 0xCBCB }, /* R18 - ADC Record Gain */
45 { 20, 0x7F7
[all...] |
| /linux/include/net/9p/ |
| H A D | 9p.h | 33 P9_DEBUG_ERROR = (1<<0),
209 P9_OREAD = 0x00,
210 P9_OWRITE = 0x01,
211 P9_ORDWR = 0x02,
212 P9_OEXEC = 0x03,
213 P9_OTRUNC = 0x10,
214 P9_OREXEC = 0x20,
215 P9_ORCLOSE = 0x40,
216 P9_OAPPEND = 0x80,
217 P9_OEXCL = 0x100
[all...] |
| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7870-j6lte.dts | 38 reg = <0x0 0x67000000 (720 * 1480 * 4)>;
51 pinctrl-0 = <&hall_irq>;
68 pinctrl-0 = <&key_power &key_voldown &key_volup>;
72 gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
84 gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
91 reg = <0x0 0x40000000 0x3d800000>,
92 <0x
[all...] |
| /linux/drivers/input/ |
| H A D | ff-memless.c | 31 #define FF_EFFECT_STARTED 0
113 unsigned long earliest = 0; in ml_schedule_timer()
115 int events = 0; in ml_schedule_timer()
120 for (i = 0; i < FF_MEMLESS_EFFECTS; i++) { in ml_schedule_timer()
162 pr_debug("value = 0x%x, attack_level = 0x%x\n", in apply_envelope()
166 envelope_level = min_t(u16, envelope->attack_level, 0x7fff); in apply_envelope()
174 envelope_level = min_t(u16, envelope->fade_level, 0x7fff); in apply_envelope()
181 pr_debug("time_from_level = 0x%x\n", time_from_level); in apply_envelope()
182 pr_debug("time_of_envelope = 0 in apply_envelope()
[all...] |
| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a774e1.dtsi | 19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
[all...] |
| /linux/drivers/media/dvb-frontends/ |
| H A D | dib0090.c | 25 MODULE_PARM_DESC(debug, "turn on debugging (default: 0)");
31 } while (0)
40 #define EN_LNA0 0x8000
41 #define EN_LNA1 0x4000
42 #define EN_LNA2 0x2000
43 #define EN_LNA3 0x1000
44 #define EN_MIX0 0x0800
45 #define EN_MIX1 0x0400
46 #define EN_MIX2 0x020
[all...] |
| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-ibm-everest.dts | 175 reg = <0x80000000 0x40000000>;
185 reg = <0xb3d00000 0x100000>;
190 reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
191 record-size = <0x8000>;
[all...] |
| /linux/fs/jfs/ |
| H A D | jfs_logmgr.h | 32 * block 0 of the log logical volume is not used (ipl etc).
48 #define LOGMAGIC 0x87654321
75 #define LOGMOUNT 0 /* log mounted by lmLogInit() */
155 #define LOG_COMMIT 0x8000
156 #define LOG_SYNCPT 0x4000
157 #define LOG_MOUNT 0x2000
158 #define LOG_REDOPAGE 0x0800
159 #define LOG_NOREDOPAGE 0x0080
160 #define LOG_NOREDOINOEXT 0x004
[all...] |
| /linux/drivers/scsi/lpfc/ |
| H A D | lpfc_sli.h | 102 #define LPFC_IO_FABRIC 0x10 /* Iocb send using fabric scheduler */
103 #define LPFC_DELAY_MEM_FREE 0x20 /* Defer free'ing of FC data */
104 #define LPFC_EXCHANGE_BUSY 0x40 /* SLI4 hba reported XB in response */
105 #define LPFC_USE_FCPWQIDX 0x80 /* Submit to specified FCPWQ index */
106 #define DSS_SECURITY_OP 0x100 /* security IO */
107 #define LPFC_IO_ON_TXCMPLQ 0x200 /* The IO is still on the TXCMPLQ */
108 #define LPFC_IO_DIF_PASS 0x400 /* T10 DIF IO pass-thru prot */
109 #define LPFC_IO_DIF_STRIP 0x800 /* T10 DIF IO strip prot */
110 #define LPFC_IO_DIF_INSERT 0x1000 /* T10 DIF IO insert prot */
111 #define LPFC_IO_CMD_OUTSTANDING 0x200
[all...] |
| /linux/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| H A D | sta.h | 68 STA_FLG_MAX_AGG_SIZE_8K = (0 << STA_FLG_MAX_AGG_SIZE_SHIFT),
78 STA_FLG_MAX_AGG_SIZE_MSK = (0xf << STA_FLG_MAX_AGG_SIZE_SHIFT),
87 STA_FLG_FAT_EN_20MHZ = (0 << 26),
93 STA_FLG_MIMO_EN_SISO = (0 << 28),
110 * @STA_KEY_FLG_WEP_KEY_MAP: wep is either a group key (0 - legacy WEP) or from
122 STA_KEY_FLG_NO_ENC = (0 << 0),
123 STA_KEY_FLG_WEP = (1 << 0),
124 STA_KEY_FLG_CCM = (2 << 0),
125 STA_KEY_FLG_TKIP = (3 << 0),
[all...] |
| /linux/tools/perf/trace/beauty/include/linux/ |
| H A D | socket.h | 161 return (struct cmsghdr *)0; in __cmsg_nxthdr()
178 #define SCM_RIGHTS 0x01 /* rw: access rights (array of int) */
179 #define SCM_CREDENTIALS 0x02 /* rw: struct ucred */
180 #define SCM_SECURITY 0x03 /* rw: security label */
181 #define SCM_PIDFD 0x04 /* ro: pidfd (int) */
190 #define AF_UNSPEC 0
309 #define MSG_PROBE 0x10 /* Do not send. Only probe path f.e. for MTU */
310 #define MSG_TRUNC 0x20
311 #define MSG_DONTWAIT 0x40 /* Nonblocking io */
312 #define MSG_EOR 0x8
[all...] |
| /linux/arch/arm/boot/dts/microchip/ |
| H A D | sama5d2.dtsi | 29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
35 d-cache-size = <0x8000>; // L1, 32 KB
36 i-cache-size = <0x8000>; // L1, 32 KB
43 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
48 reg = <0x740000 0x100
[all...] |
| /linux/drivers/scsi/ |
| H A D | qla1280.h | 17 #define BIT_0 0x1
18 #define BIT_1 0x2
19 #define BIT_2 0x4
20 #define BIT_3 0x8
21 #define BIT_4 0x10
22 #define BIT_5 0x20
23 #define BIT_6 0x40
24 #define BIT_7 0x80
25 #define BIT_8 0x100
26 #define BIT_9 0x20
[all...] |
| /linux/arch/arm/vfp/ |
| H A D | vfpsingle.c | 44 .sign = 0,
51 str, s->sign != 0, s->exponent, s->significand); in vfp_single_dump()
83 if (vs->exponent == 255 && (vs->significand == 0 || exceptions)) in __vfp_single_normaliseround()
89 if (vs->significand == 0) { in __vfp_single_normaliseround()
90 vs->exponent = 0; in __vfp_single_normaliseround()
117 underflow = exponent < 0; in __vfp_single_normaliseround()
120 exponent = 0; in __vfp_single_normaliseround()
127 underflow = 0; in __vfp_single_normaliseround()
133 incr = 0; in __vfp_single_normaliseround()
138 if ((significand & (1 << (VFP_SINGLE_LOW_BITS + 1))) == 0) in __vfp_single_normaliseround()
[all...] |
| /linux/drivers/net/ethernet/sun/ |
| H A D | niu.h | 10 #define PIO 0x000000UL
11 #define FZC_PIO 0x080000UL
12 #define FZC_MAC 0x180000UL
13 #define FZC_IPP 0x280000UL
14 #define FFLP 0x300000UL
15 #define FZC_FFLP 0x380000UL
16 #define PIO_VADDR 0x400000UL
17 #define ZCP 0x500000UL
18 #define FZC_ZCP 0x580000UL
19 #define DMC 0x600000U
[all...] |
| /linux/drivers/comedi/drivers/ |
| H A D | me4000.c | 45 #define ME4000_AO_CHAN(x) ((x) * 0x18)
47 #define ME4000_AO_CTRL_REG(x) (0x00 + ME4000_AO_CHAN(x))
48 #define ME4000_AO_CTRL_MODE_0 BIT(0)
58 #define ME4000_AO_STATUS_REG(x) (0x04 + ME4000_AO_CHAN(x))
59 #define ME4000_AO_STATUS_FSM BIT(0)
63 #define ME4000_AO_FIFO_REG(x) (0x08 + ME4000_AO_CHAN(x))
64 #define ME4000_AO_SINGLE_REG(x) (0x0c + ME4000_AO_CHAN(x))
65 #define ME4000_AO_TIMER_REG(x) (0x10 + ME4000_AO_CHAN(x))
66 #define ME4000_AI_CTRL_REG 0x74
67 #define ME4000_AI_STATUS_REG 0x7
[all...] |