| /qemu/include/hw/arm/ |
| H A D | fsl-imx6.h | 86 #define FSL_IMX6_MMDC_ADDR 0x10000000
87 #define FSL_IMX6_MMDC_SIZE 0xF0000000
88 #define FSL_IMX6_EIM_MEM_ADDR 0x08000000
89 #define FSL_IMX6_EIM_MEM_SIZE 0x8000000
90 #define FSL_IMX6_IPU_2_ADDR 0x02800000
91 #define FSL_IMX6_IPU_2_SIZE 0x400000
92 #define FSL_IMX6_IPU_1_ADDR 0x02400000
93 #define FSL_IMX6_IPU_1_SIZE 0x400000
94 #define FSL_IMX6_MIPI_HSI_ADDR 0x02208000
95 #define FSL_IMX6_MIPI_HSI_SIZE 0x4000
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| H A D | fsl-imx31.h | 60 #define FSL_IMX31_SECURE_ROM_ADDR 0x00000000
61 #define FSL_IMX31_SECURE_ROM_SIZE 0x4000
62 #define FSL_IMX31_ROM_ADDR 0x00404000
63 #define FSL_IMX31_ROM_SIZE 0x4000
64 #define FSL_IMX31_IRAM_ALIAS_ADDR 0x10000000
65 #define FSL_IMX31_IRAM_ALIAS_SIZE 0xFFC0000
66 #define FSL_IMX31_IRAM_ADDR 0x1FFFC000
67 #define FSL_IMX31_IRAM_SIZE 0x4000
68 #define FSL_IMX31_I2C1_ADDR 0x43F80000
69 #define FSL_IMX31_I2C1_SIZE 0x4000
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| H A D | fsl-imx25.h | 74 * 0x0000_0000 0x0000_3FFF 16 Kbytes ROM (36 Kbytes)
75 * 0x0000_4000 0x0040_3FFF 4 Mbytes Reserved
76 * 0x0040_4000 0x0040_8FFF 20 Kbytes ROM (36 Kbytes)
77 * 0x0040_9000 0x0FFF_FFFF 252 Mbytes (minus 36 Kbytes) Reserved
78 * 0x1000_0000 0x1FFF_FFFF 256 Mbytes Reserved
79 * 0x2000_0000 0x2FFF_FFFF 256 Mbytes Reserved
80 * 0x3000_0000 0x3FFF_FFFF 256 Mbytes Reserved
81 * 0x4000_0000 0x43EF_FFFF 63 Mbytes Reserved
82 * 0x43F0_0000 0x43F0_3FFF 16 Kbytes AIPS A control registers
83 * 0x43F0_4000 0x43F0_7FFF 16 Kbytes ARM926 platform MAX
[all …]
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| /qemu/tests/qtest/ |
| H A D | rtl8139-test.c | 40 qpci_device_foreach(pcibus, 0x10ec, 0x8139, save_fn, &dev); in get_device()
63 PORT(Timer, l, 0x48)
64 PORT(IntrMask, w, 0x3c)
65 PORT(IntrStatus, w, 0x3E)
66 PORT(TimerInt, l, 0x54)
68 #define fatal(...) do { g_test_message(__VA_ARGS__); g_assert_not_reached(); } while (0)
77 out_IntrMask(0); in test_timer()
84 out_TimerInt(0); /* disable timer */ in test_timer()
85 out_IntrStatus(0x4000); in test_timer()
86 out_Timer(12345); /* reset timer to 0 */ in test_timer()
[all …]
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| /qemu/tests/qemu-iotests/ |
| H A D | 046 | 25 seq=`basename $0`
34 trap "_cleanup; exit \$status" 0 1 2 3 15
60 local pattern=0
61 local cur_sec=0
63 for ((i=0;i<=$((sectors - 1));i++)); do
71 backing_io 0 32 write | $QEMU_IO "$TEST_IMG" | _filter_qemu_io
84 aio_write -P 10 0x18000 0x2000
87 aio_write -P 11 0x12000 0x2000
88 aio_write -P 12 0x1c000 0x2000
98 aio_write -P 20 0x28000 0x2000
[all …]
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| /qemu/hw/audio/ |
| H A D | gusemu_mixer.c | 45 for (count = 0; count < numsamples * 2; count++) in gus_mixvoices()
46 *(bufferpos + count) = 0; /* clear */ in gus_mixvoices()
50 if (!(GUSregb(GUS4cReset) & 0x01)) /* reset flag active? */ in gus_mixvoices()
53 for (Voice = 0; Voice <= (GUSregb(NumVoices) & 31); Voice++) in gus_mixvoices()
55 if (GUSvoice(wVSRControl) & 0x200) in gus_mixvoices()
56 GUSvoice(wVSRControl) |= 0x100; /* voice stop request */ in gus_mixvoices()
57 if (GUSvoice(wVSRVolRampControl) & 0x200) in gus_mixvoices()
58 GUSvoice(wVSRVolRampControl) |= 0x100; /* Volume ramp stop request */ in gus_mixvoices()
59 …if (!(GUSvoice(wVSRControl) & GUSvoice(wVSRVolRampControl) & 0x100)) /* neither voice nor volume c… in gus_mixvoices()
69 int PanningPos = (GUSvoice(wVSRPanning) >> 8) & 0xf; in gus_mixvoices()
[all …]
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| /qemu/tests/tcg/i386/ |
| H A D | test-i386.c | 59 #define CC_C 0x0001
60 #define CC_P 0x0004
61 #define CC_A 0x0010
62 #define CC_Z 0x0040
63 #define CC_S 0x0080
64 #define CC_O 0x0800
73 return v | ((v ^ 0xabcd) << 32); in i2l()
187 asm("lea " STR ", %0"\
195 asm("lea " STR ", %0"\
203 asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
[all …]
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| /qemu/linux-user/generic/ |
| H A D | target_mman.h | 5 #define TARGET_MAP_SHARED 0x01
6 #define TARGET_MAP_PRIVATE 0x02
7 #define TARGET_MAP_SHARED_VALIDATE 0x03
9 /* 0x0100 - 0x4000 flags are defined in asm-generic/mman.h */
11 #define TARGET_MAP_GROWSDOWN 0x0100
14 #define TARGET_MAP_DENYWRITE 0x0800
17 #define TARGET_MAP_EXECUTABLE 0x1000
20 #define TARGET_MAP_LOCKED 0x2000
23 #define TARGET_MAP_NORESERVE 0x4000
28 #define TARGET_PROT_SEM 0x08
[all …]
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| /qemu/include/hw/s390x/ |
| H A D | ioinst.h | 31 #define SCSW_FLAGS_MASK_KEY 0xf000
32 #define SCSW_FLAGS_MASK_SCTL 0x0800
33 #define SCSW_FLAGS_MASK_ESWF 0x0400
34 #define SCSW_FLAGS_MASK_CC 0x0300
35 #define SCSW_FLAGS_MASK_FMT 0x0080
36 #define SCSW_FLAGS_MASK_PFCH 0x0040
37 #define SCSW_FLAGS_MASK_ISIC 0x0020
38 #define SCSW_FLAGS_MASK_ALCC 0x0010
39 #define SCSW_FLAGS_MASK_SSI 0x0008
40 #define SCSW_FLAGS_MASK_ZCC 0x0004
[all …]
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| /qemu/linux-user/arm/nwfpe/ |
| H A D | fpopcode.c | 30 { 0x0000000000000000ULL, 0x0000}, /* extended 0.0 */
31 { 0x8000000000000000ULL, 0x3fff}, /* extended 1.0 */
32 { 0x8000000000000000ULL, 0x4000}, /* extended 2.0 */
33 { 0xc000000000000000ULL, 0x4000}, /* extended 3.0 */
34 { 0x8000000000000000ULL, 0x4001}, /* extended 4.0 */
35 { 0xa000000000000000ULL, 0x4001}, /* extended 5.0 */
36 { 0x8000000000000000ULL, 0x3ffe}, /* extended 0.5 */
37 { 0xa000000000000000ULL, 0x4002} /* extended 10.0 */
41 const_float64(0x0000000000000000ULL), /* double 0.0 */
42 const_float64(0x3ff0000000000000ULL), /* double 1.0 */
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| /qemu/docs/specs/ |
| H A D | fw_cfg.rst | 30 setting is being written. A value of 0 means the item is only being
34 the selector value is between 0x4000-0x7fff or 0xc000-0xffff.
46 setting is architecture specific. A value of 0 means the item is a
49 items are accessed with a selector value between 0x0000-0x7fff, and
51 value between 0x8000-0xffff.
78 value of 0x00, and all writes will be ignored.
88 * Selector Register IOport: 0x510
89 * Data Register IOport: 0x511
90 * DMA Address IOport: 0x514
94 * Data Register address: Base + 0 (8 bytes)
[all …]
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| /qemu/include/hw/acpi/ |
| H A D | acpi.h | 63 #define ACPI_BITMASK_TIMER_STATUS 0x0001
64 #define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
65 #define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
66 #define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
67 #define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
68 #define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
69 #define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
70 #define ACPI_BITMASK_WAKE_STATUS 0x8000
82 #define ACPI_BITMASK_TIMER_ENABLE 0x0001
83 #define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
[all …]
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| /qemu/include/hw/intc/ |
| H A D | mips_gic.h | 24 #define GIC_BASE_ADDR 0x1bdc0000ULL
29 #define GIC_POL_NEG 0
31 #define GIC_TRIG_LEVEL 0
36 #define SHARED_SECTION_OFS 0x0000
37 #define SHARED_SECTION_SIZE 0x8000
38 #define VP_LOCAL_SECTION_OFS 0x8000
39 #define VP_LOCAL_SECTION_SIZE 0x4000
40 #define VP_OTHER_SECTION_OFS 0xc000
41 #define VP_OTHER_SECTION_SIZE 0x4000
42 #define USM_VISIBLE_SECTION_OFS 0x10000
[all …]
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| /qemu/linux-user/mips/ |
| H A D | target_mman.h | 4 #define TARGET_PROT_SEM 0x10
6 #define TARGET_MAP_NORESERVE 0x0400
7 #define TARGET_MAP_ANONYMOUS 0x0800
8 #define TARGET_MAP_GROWSDOWN 0x1000
9 #define TARGET_MAP_DENYWRITE 0x2000
10 #define TARGET_MAP_EXECUTABLE 0x4000
11 #define TARGET_MAP_LOCKED 0x8000
12 #define TARGET_MAP_POPULATE 0x10000
13 #define TARGET_MAP_NONBLOCK 0x20000
14 #define TARGET_MAP_STACK 0x40000
[all …]
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| /qemu/linux-user/xtensa/ |
| H A D | target_mman.h | 4 #define TARGET_PROT_SEM 0x10
6 #define TARGET_MAP_NORESERVE 0x0400
7 #define TARGET_MAP_ANONYMOUS 0x0800
8 #define TARGET_MAP_GROWSDOWN 0x1000
9 #define TARGET_MAP_DENYWRITE 0x2000
10 #define TARGET_MAP_EXECUTABLE 0x4000
11 #define TARGET_MAP_LOCKED 0x8000
12 #define TARGET_MAP_POPULATE 0x10000
13 #define TARGET_MAP_NONBLOCK 0x20000
14 #define TARGET_MAP_STACK 0x40000
[all …]
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| /qemu/include/hw/ppc/ |
| H A D | mac_dbdma.h | 53 #define DBDMA_CONTROL 0x00
54 #define DBDMA_STATUS 0x01
55 #define DBDMA_CMDPTR_HI 0x02
56 #define DBDMA_CMDPTR_LO 0x03
57 #define DBDMA_INTR_SEL 0x04
58 #define DBDMA_BRANCH_SEL 0x05
59 #define DBDMA_WAIT_SEL 0x06
60 #define DBDMA_XFER_MODE 0x07
61 #define DBDMA_DATA2PTR_HI 0x08
62 #define DBDMA_DATA2PTR_LO 0x09
[all …]
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| /qemu/include/hw/usb/ |
| H A D | xhci.h | 17 #define XHCI_LEN_REGS 0x4000
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| /qemu/linux-user/sh4/ |
| H A D | target_syscall.h | 26 return 0x4000; in target_shmlba()
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| /qemu/include/standard-headers/asm-x86/ |
| H A D | bootparam.h | 8 #define RAMDISK_IMAGE_START_MASK 0x07FF
9 #define RAMDISK_PROMPT_FLAG 0x8000
10 #define RAMDISK_LOAD_FLAG 0x4000
13 #define LOADED_HIGH (1<<0)
20 #define XLF_KERNEL_64 (1<<0)
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| /qemu/hw/cpu/ |
| H A D | a15mpcore.c | 43 memory_region_init(&s->container, obj, "a15mp-priv-container", 0x8000); in a15mp_priv_initfn()
74 cpuobj = OBJECT(qemu_get_cpu(0)); in a15mp_priv_realize()
98 for (i = 0; i < s->num_cpu; i++) { in a15mp_priv_realize()
111 for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) { in a15mp_priv_realize()
124 * 0x0000-0x0fff -- reserved in a15mp_priv_realize()
125 * 0x1000-0x1fff -- GIC Distributor in a15mp_priv_realize()
126 * 0x2000-0x3fff -- GIC CPU interface in a15mp_priv_realize()
127 * 0x4000-0x4fff -- GIC virtual interface control for this CPU in a15mp_priv_realize()
128 * 0x5000-0x51ff -- GIC virtual interface control for CPU 0 in a15mp_priv_realize()
129 * 0x5200-0x53ff -- GIC virtual interface control for CPU 1 in a15mp_priv_realize()
[all …]
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| /qemu/linux-headers/asm-generic/ |
| H A D | mman.h | 7 #define MAP_GROWSDOWN 0x0100 /* stack-like segment */
8 #define MAP_DENYWRITE 0x0800 /* ETXTBSY */
9 #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
10 #define MAP_LOCKED 0x2000 /* pages are locked */
11 #define MAP_NORESERVE 0x4000 /* don't check for reservations */
22 #define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */
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| /qemu/linux-headers/asm-powerpc/ |
| H A D | mman.h | 14 #define PROT_SAO 0x10 /* Strong Access Ordering */
17 #define MAP_NORESERVE 0x40 /* don't reserve swap pages */
18 #define MAP_LOCKED 0x80
20 #define MAP_GROWSDOWN 0x0100 /* stack-like segment */
21 #define MAP_DENYWRITE 0x0800 /* ETXTBSY */
22 #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
25 #define MCL_CURRENT 0x2000 /* lock all currently mapped pages */
26 #define MCL_FUTURE 0x4000 /* lock all additions to address space */
27 #define MCL_ONFAULT 0x8000 /* lock all pages that are faulted in */
30 #define PKEY_DISABLE_EXECUTE 0x4
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| /qemu/linux-user/sparc/ |
| H A D | target_fcntl.h | 11 #define TARGET_O_APPEND 0x0008
12 #define TARGET_FASYNC 0x0040 /* fcntl, for BSD compatibility */
13 #define TARGET_O_CREAT 0x0200 /* not fcntl */
14 #define TARGET_O_TRUNC 0x0400 /* not fcntl */
15 #define TARGET_O_EXCL 0x0800 /* not fcntl */
16 #define TARGET_O_DSYNC 0x2000
17 #define TARGET_O_NONBLOCK 0x4000
19 # define TARGET_O_NDELAY 0x0004
21 # define TARGET_O_NDELAY (0x0004 | TARGET_O_NONBLOCK)
23 #define TARGET_O_NOCTTY 0x8000 /* not fcntl */
[all …]
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| /qemu/include/hw/pci-host/ |
| H A D | ls7a.h | 16 #define VIRT_PCI_MEM_BASE 0x40000000UL
17 #define VIRT_PCI_MEM_SIZE 0x40000000UL
18 #define VIRT_PCI_IO_OFFSET 0x4000
19 #define VIRT_PCI_CFG_BASE 0x20000000
20 #define VIRT_PCI_CFG_SIZE 0x08000000
21 #define VIRT_PCI_IO_BASE 0x18004000UL
22 #define VIRT_PCI_IO_SIZE 0xC000
24 #define VIRT_PCH_REG_BASE 0x10000000UL
26 #define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
27 #define VIRT_PCH_REG_SIZE 0x400
[all …]
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| /qemu/tests/tcg/s390x/ |
| H A D | mc.S | 1 .org 0x8d
3 .org 0x8e
5 .org 0x94
7 .org 0xb0
9 .org 0x150
11 .org 0x1d0 /* program new PSW */
12 .quad 0x180000000,pgm /* 64-bit mode */
13 .org 0x200 /* lowcore padding */
17 mvhhi c8+6,0x4000
20 mc 123,0
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