Searched +full:0 +full:x308000 (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | marvell,odmi-controller.yaml | 32 interrupts are 0-based, i.e. marvell,spi-base = <128> will use SPI #96.
52 reg = <0x300000 0x4000>, <0x304000 0x4000>, <0x308000 0x4000>, <0x30C000 0x4000>;
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| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap80x.dtsi | 41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
77 ranges = <0x0 0x0 0xf0000000 0x1000000>;
81 reg = <0x100000 0x100000>;
105 reg = <0x210000 0x10000>,
106 <0x220000 0x20000>,
107 <0x240000 0x20000>,
108 <0x260000 0x20000>;
113 reg = <0x280000 0x1000>;
120 reg = <0x290000 0x1000>;
[all …]
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| /linux/arch/arm/boot/dts/ti/davinci/ |
| H A D | da850.dtsi | 16 reg = <0xc0000000 0x0>;
21 #size-cells = <0>;
23 cpu: cpu@0 {
26 reg = <0>;
78 reg = <0xfffee000 0x2000>;
84 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #clock-cells = <0>;
102 reg = <0x11800000 0x40000>,
103 <0x11e00000 0x8000>,
[all …]
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| /linux/drivers/crypto/hisilicon/zip/ |
| H A D | zip_main.c | 18 #define PCI_DEVICE_ID_HUAWEI_ZIP_PF 0xa250
22 #define HZIP_CLOCK_GATE_CTRL 0x301004
24 #define HZIP_FSM_MAX_CNT 0x301008
26 #define HZIP_PORT_ARCA_CHE_0 0x301040
27 #define HZIP_PORT_ARCA_CHE_1 0x301044
28 #define HZIP_PORT_AWCA_CHE_0 0x301060
29 #define HZIP_PORT_AWCA_CHE_1 0x301064
30 #define HZIP_CACHE_ALL_EN 0xffffffff
32 #define HZIP_BD_RUSER_32_63 0x301110
33 #define HZIP_SGL_RUSER_32_63 0x30111c
[all …]
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