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/linux-6.8/drivers/net/wan/
Dwanxlfw.inc_shipped2 0x60,0x00,0x00,0x16,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
3 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0xB9,0x40,0x00,0x00,0x00,0x00,0x00,
4 0x10,0x14,0x42,0x80,0x4A,0xB0,0x09,0xB0,0x00,0x00,0x10,0x04,0x67,0x00,0x00,0x0E,
5 0x06,0xB0,0x40,0x00,0x00,0x00,0x09,0xB0,0x00,0x00,0x10,0x04,0x58,0x80,0x0C,0x80,
6 0x00,0x00,0x00,0x10,0x66,0x00,0xFF,0xDE,0x21,0xFC,0x00,0x00,0x16,0xBC,0x00,0x6C,
7 0x21,0xFC,0x00,0x00,0x17,0x5E,0x01,0x00,0x21,0xFC,0x00,0x00,0x16,0xDE,0x01,0x78,
8 0x21,0xFC,0x00,0x00,0x16,0xFE,0x01,0x74,0x21,0xFC,0x00,0x00,0x17,0x1E,0x01,0x70,
9 0x21,0xFC,0x00,0x00,0x17,0x3E,0x01,0x6C,0x21,0xFC,0x00,0x00,0x18,0x4C,0x02,0x00,
10 0x23,0xFC,0x78,0x00,0x00,0x00,0xFF,0xFC,0x15,0x48,0x33,0xFC,0x04,0x80,0xFF,0xFC,
11 0x10,0x26,0x33,0xFC,0x01,0x10,0xFF,0xFC,0x10,0x2A,0x23,0xFC,0x00,0xD4,0x9F,0x40,
[all …]
/linux-6.8/drivers/iio/gyro/
Dst_gyro_core.c25 #define ST_GYRO_DEFAULT_OUT_X_L_ADDR 0x28
26 #define ST_GYRO_DEFAULT_OUT_Y_L_ADDR 0x2a
27 #define ST_GYRO_DEFAULT_OUT_Z_L_ADDR 0x2c
70 .wai = 0xd3,
73 [0] = L3G4200D_GYRO_DEV_NAME,
78 .addr = 0x20,
79 .mask = 0xc0,
81 { .hz = 100, .value = 0x00, },
82 { .hz = 200, .value = 0x01, },
83 { .hz = 400, .value = 0x02, },
[all …]
/linux-6.8/arch/arm/mach-omap2/
Dopp4xxx_data.c32 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
33 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
34 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
35 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
36 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITROSB_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITROSB, 0xfa, 0x27),
37 VOLT_DATA_DEFINE(0, 0, 0, 0),
45 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
46 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
47 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
48 VOLT_DATA_DEFINE(0, 0, 0, 0),
[all …]
/linux-6.8/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
234 "\x00\xBB\xF8\x2F\x09\x06\x82\xCE\x9C\x23\x38\xAC\x2B\x9D\xA8\x71"
257 "\x32\x12\x4E\xF0\x23\x6E\x5D\x1E\x3B\x7E\x28\xFA\xE7\xAA\x04\x0A"
267 "\x54\x49\x4C\xA6\x3E\xBA\x03\x37\xE4\xE2\x40\x23\xFC\xD6\x9A\x5A"
277 "\x00\xB0\x6C\x4F\xDA\xBB\x63\x01\x19\x8D\x26\x5B\xDB\xAE\x94\x23"
331 "\x77\xAF\x51\x27\x5B\x5E\x69\xB8\x81\xE6\x11\xC5\x43\x23\x81\x04"
468 "\xB9\x23\x40\xA8\x86\x1E\x38\x83\xB2\x73\x1D\x53\xFB\x9E\x2A\x8A"
476 "\xC4\xB7\x05\x5A\xB7\x41\x0A\x23\x8E\x03\x8A\x1C\xAE\xD3\x1E\xCE"
497 "\x1B\x69\x03\xF2\x7B\xEB\xE5\x8C\x14\xD6\x23\x4F\x52\x6F\x18\xA6"
[all …]
/linux-6.8/tools/testing/selftests/arm64/signal/
Dsignals.S28 add x23, sp, x22 /* new sigframe base with misaligment if any */
32 mov x2, x23
36 mov x0, x23
52 str x23, [x0]
54 mov sp, x23
57 svc #0
/linux-6.8/drivers/iio/accel/
Dst_accel_core.c26 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28
27 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a
28 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c
113 .wai = 0x33,
116 [0] = LIS3DH_ACCEL_DEV_NAME,
127 .addr = 0x20,
128 .mask = 0xf0,
130 { .hz = 1, .value = 0x01, },
131 { .hz = 10, .value = 0x02, },
132 { .hz = 25, .value = 0x03, },
[all …]
/linux-6.8/tools/perf/pmu-events/arch/x86/knightslanding/
Duncore-io.json4 "EventCode": "0x25",
7 "UMask": "0x1",
12 "EventCode": "0x25",
15 "UMask": "0x8",
20 "EventCode": "0x25",
23 "UMask": "0x2",
28 "EventCode": "0x25",
31 "UMask": "0x10",
36 "EventCode": "0x25",
39 "UMask": "0x4",
[all …]
/linux-6.8/arch/arm64/kernel/
Dentry.S33 .irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
41 .if \el == 0
65 tbnz x0, #THREAD_SHIFT, 0f
70 0:
126 nop // Patched to SMC/HVC #0
199 .if \el == 0
205 stp x0, x1, [sp, #16 * 0]
216 stp x22, x23, [sp, #16 * 11]
221 .if \el == 0
236 check_mte_async_tcf x22, x23, x0
[all …]
Dhead.S40 #if (PAGE_OFFSET & 0x1fffff) != 0
62 .quad 0 // Image load offset from start of RAM, little-endian
65 .quad 0 // reserved
66 .quad 0 // reserved
67 .quad 0 // reserved
84 * x23 primary_entry() .. start_kernel() physical misalignment/KASLR offset
99 cbz x19, 0f
104 0: mov x0, x19
131 b.ne 0f
133 0:
[all …]
/linux-6.8/lib/crypto/
Dcurve25519-fiat32.c18 * entries t[0]...t[9], represents the integer t[0]+2^26 t[1]+2^51 t[2]+2^77
41 h[0] = a0&((1<<26)-1); /* 26 used, 32-26 left. 26 */ in fe_frombytes_impl()
104 t = -!!t; /* all set if nonzero, 0 if 0 */ in cmovznz32()
119 { const u32 x2 = in1[0]; in fe_freeze()
120 { u32 x20; u8/*bool*/ x21 = subborrow_u26(0x0, x2, 0x3ffffed, &x20); in fe_freeze()
121 { u32 x23; u8/*bool*/ x24 = subborrow_u25(x21, x4, 0x1ffffff, &x23); in fe_freeze() local
122 { u32 x26; u8/*bool*/ x27 = subborrow_u26(x24, x6, 0x3ffffff, &x26); in fe_freeze()
123 { u32 x29; u8/*bool*/ x30 = subborrow_u25(x27, x8, 0x1ffffff, &x29); in fe_freeze()
124 { u32 x32; u8/*bool*/ x33 = subborrow_u26(x30, x10, 0x3ffffff, &x32); in fe_freeze()
125 { u32 x35; u8/*bool*/ x36 = subborrow_u25(x33, x12, 0x1ffffff, &x35); in fe_freeze()
[all …]
/linux-6.8/drivers/net/wireless/mediatek/mt7601u/
Dinitvals_phy.h14 /* Bank 0 - for central blocks: BG, PLL, XTAL, LO, ADC/DAC */
15 RF_REG_PAIR(0, 0, 0x02),
16 RF_REG_PAIR(0, 1, 0x01),
17 RF_REG_PAIR(0, 2, 0x11),
18 RF_REG_PAIR(0, 3, 0xff),
19 RF_REG_PAIR(0, 4, 0x0a),
20 RF_REG_PAIR(0, 5, 0x20),
21 RF_REG_PAIR(0, 6, 0x00),
23 RF_REG_PAIR(0, 7, 0x00),
24 RF_REG_PAIR(0, 8, 0x00),
[all …]
/linux-6.8/drivers/gpu/drm/
Ddrm_edid_load.c38 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
39 0x31, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
40 0x05, 0x16, 0x01, 0x03, 0x6d, 0x1b, 0x14, 0x78,
41 0xea, 0x5e, 0xc0, 0xa4, 0x59, 0x4a, 0x98, 0x25,
42 0x20, 0x50, 0x54, 0x01, 0x00, 0x00, 0x45, 0x40,
43 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
44 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0xa0, 0x0f,
45 0x20, 0x00, 0x31, 0x58, 0x1c, 0x20, 0x28, 0x80,
46 0x14, 0x00, 0x15, 0xd0, 0x10, 0x00, 0x00, 0x1e,
47 0x00, 0x00, 0x00, 0xff, 0x00, 0x4c, 0x69, 0x6e,
[all …]
/linux-6.8/drivers/gpu/drm/i915/display/
Dintel_cx0_phy.c25 for ((__lane) = 0; (__lane) < 2; (__lane)++) \
28 #define INTEL_CX0_LANE0 BIT(0)
44 return 0; in lane_mask_to_lane()
58 * In DP-alt with pin assignment D, only PHY lane 0 is owned in intel_cx0_get_owned_lane_mask()
121 0, XELPDP_PORT_P2M_RESPONSE_READY | XELPDP_PORT_P2M_ERROR_SET); in intel_clear_response_ready_flag()
152 drm_dbg_kms(&i915->drm, "PHY %c Timeout waiting for message ACK. Status: 0x%x\n", in intel_cx0_wait_for_ack()
166 drm_dbg_kms(&i915->drm, "PHY %c Error occurred during %s command. Status: 0x%x\n", phy_name(phy), in intel_cx0_wait_for_ack()
173 drm_dbg_kms(&i915->drm, "PHY %c Not a %s response. MSGBUS Status: 0x%x.\n", phy_name(phy), in intel_cx0_wait_for_ack()
179 return 0; in intel_cx0_wait_for_ack()
204 if (ack < 0) in __intel_cx0_read_once()
[all …]
/linux-6.8/drivers/infiniband/hw/qib/
Dqib_7322_regs.h35 #define QIB_7322_Revision_OFFS 0x0
36 #define QIB_7322_Revision_DEF 0x0000000002010601
37 #define QIB_7322_Revision_R_Simulator_LSB 0x3F
38 #define QIB_7322_Revision_R_Simulator_MSB 0x3F
39 #define QIB_7322_Revision_R_Simulator_RMASK 0x1
40 #define QIB_7322_Revision_R_Emulation_LSB 0x3E
41 #define QIB_7322_Revision_R_Emulation_MSB 0x3E
42 #define QIB_7322_Revision_R_Emulation_RMASK 0x1
43 #define QIB_7322_Revision_R_Emulation_Revcode_LSB 0x28
44 #define QIB_7322_Revision_R_Emulation_Revcode_MSB 0x3D
[all …]
/linux-6.8/drivers/media/common/
Dttpci-eeprom.c32 #define dprintk(x...) do { printk(x); } while (0)
34 #define dprintk(x...) do { } while (0)
41 u16 tmp = 0xffff; in check_mac_tt()
43 for (i = 0; i < 8; i++) { in check_mac_tt()
45 tmp ^= (tmp >> 4) & 0x0f; in check_mac_tt()
46 tmp ^= (tmp << 12) ^ ((tmp & 0xff) << 5); in check_mac_tt()
48 tmp ^= 0xffff; in check_mac_tt()
49 return (((tmp >> 8) ^ buf[8]) | ((tmp & 0xff) ^ buf[9])); in check_mac_tt()
54 u8 xor[20] = { 0x72, 0x23, 0x68, 0x19, 0x5c, 0xa8, 0x71, 0x2c, in getmac_tt()
55 0x54, 0xd3, 0x7b, 0xf1, 0x9E, 0x23, 0x16, 0xf6, in getmac_tt()
[all …]
/linux-6.8/arch/powerpc/kernel/vdso/
Dsigtramp32.S42 .byte 0x0f; /* DW_CFA_def_cfa_expression */ \
45 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
46 .byte 0x06; /* DW_OP_deref */ \
47 .byte 0x23; .uleb128 RSIZE; /* DW_OP_plus_uconst */ \
48 .byte 0x06; /* DW_OP_deref */ \
54 .byte 0x10; /* DW_CFA_expression */ \
58 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
59 .byte 0x06; /* DW_OP_deref */ \
61 .byte 0x23; .uleb128 ofs; /* DW_OP_plus_uconst */ \
67 the pt_regs struct. This macro is for REGNO == 0, and contains
[all …]
Dsigtramp64.S41 .long 0,0,0
42 .quad 0,-21*8
47 .byte 0x0f; /* DW_CFA_def_cfa_expression */ \
50 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
51 .byte 0x06; /* DW_OP_deref */ \
52 .byte 0x23; .uleb128 RSIZE; /* DW_OP_plus_uconst */ \
53 .byte 0x06; /* DW_OP_deref */ \
59 .byte 0x10; /* DW_CFA_expression */ \
63 .byte 0x71; .sleb128 PTREGS; /* DW_OP_breg1 */ \
64 .byte 0x06; /* DW_OP_deref */ \
[all …]
/linux-6.8/drivers/isdn/capi/
Dcapiutil.c25 /* from CAPI2.0 DDK AVM Berlin GmbH */
61 /*0a */
63 /*0b */
65 /*0c */
67 /*0d */
69 /*0e */
71 /*0f */
141 /* ALERT_REQ */ [0x01] = "\x03\x04\x0c\x27\x2f\x1c\x01\x01",
142 …/* CONNECT_REQ */ [0x02] = "\x03\x14\x0e\x10\x0f\x11\x0d\x06\x08\x0a\x05\x07\x09\x01\x0b\x28\x22\x…
143 /* DISCONNECT_REQ */ [0x04] = "\x03\x04\x0c\x27\x2f\x1c\x01\x01",
[all …]
/linux-6.8/include/video/
Dtrident.h4 #define TRIDENTFB_DEBUG 0
20 #define CYBER9320 0x9320
21 #define CYBER9388 0x9388
22 #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */
23 #define CYBER9385 0x9385 /* ditto */
24 #define CYBER9397 0x9397
25 #define CYBER9397DVD 0x939A
26 #define CYBER9520 0x9520
27 #define CYBER9525DVD 0x9525
28 #define TGUI9440 0x9440
[all …]
/linux-6.8/arch/x86/include/asm/
Dpc-conf-reg.h4 * 0x22 and 0x23 variously used by PC architectures, e.g. the MP Spec,
14 #define PC_CONF_INDEX 0x22
15 #define PC_CONF_DATA 0x23
17 #define PC_CONF_MPS_IMCR 0x70
/linux-6.8/include/linux/mfd/
Daxp20x.h14 AXP152_ID = 0,
30 #define AXP192_DATACACHE(m) (0x06 + (m))
31 #define AXP20X_DATACACHE(m) (0x04 + (m))
34 #define AXP152_PWR_OP_MODE 0x01
35 #define AXP152_LDO3456_DC1234_CTRL 0x12
36 #define AXP152_ALDO_OP_MODE 0x13
37 #define AXP152_LDO0_CTRL 0x15
38 #define AXP152_DCDC2_V_OUT 0x23
39 #define AXP152_DCDC2_V_RAMP 0x25
40 #define AXP152_DCDC1_V_OUT 0x26
[all …]
/linux-6.8/drivers/media/pci/cx23885/
Dcx23885-av.c28 cx23885_flatiron_write(dev, 0x1f, in cx23885_av_work_handler()
29 cx23885_flatiron_read(dev, 0x1f) | 0x80); in cx23885_av_work_handler()
30 cx23885_flatiron_write(dev, 0x23, in cx23885_av_work_handler()
31 cx23885_flatiron_read(dev, 0x23) | 0x80); in cx23885_av_work_handler()
/linux-6.8/sound/drivers/opl4/
Dyrw801.c40 snd_opl4_read_memory(opl4, buf, 0x001200, 15); in snd_yrw801_detect()
43 snd_opl4_read_memory(opl4, buf, 0x1ffffe, 2); in snd_yrw801_detect()
44 if (buf[0] != 0x01) in snd_yrw801_detect()
46 snd_printdd("YRW801 ROM version %02x.%02x\n", buf[0], buf[1]); in snd_yrw801_detect()
47 return 0; in snd_yrw801_detect()
58 {0x14, 0x27, {0x12c,7474,100, 0,0,0x00,0xc8,0x20,0xf2,0x13,0x08,0x0}},
59 {0x28, 0x2d, {0x12d,6816,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
60 {0x2e, 0x33, {0x12e,5899,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
61 {0x34, 0x39, {0x12f,5290,100, 0,0,0x00,0xc8,0x20,0xf2,0x14,0x08,0x0}},
62 {0x3a, 0x3f, {0x130,4260,100, 0,0,0x0a,0xc8,0x20,0xf2,0x14,0x08,0x0}},
[all …]
/linux-6.8/drivers/media/dvb-frontends/
Dm88ds3103_priv.h23 #define M88RS6000_CHIP_ID 0x74
24 #define M88DS3103_CHIP_ID 0x70
26 #define M88DS3103_CHIPTYPE_3103 0
60 {0x23, 0x07},
61 {0x08, 0x03},
62 {0x0c, 0x02},
63 {0x21, 0x54},
64 {0x25, 0x8a},
65 {0x27, 0x31},
66 {0x30, 0x08},
[all …]
/linux-6.8/drivers/video/fbdev/geode/
Ddisplay_gx1.c30 outb(CONFIG_CCR3, 0x22); in gx1_read_conf_reg()
31 ccr3 = inb(0x23); in gx1_read_conf_reg()
32 outb(CONFIG_CCR3, 0x22); in gx1_read_conf_reg()
33 outb(ccr3 | CONFIG_CCR3_MAPEN, 0x23); in gx1_read_conf_reg()
34 outb(reg, 0x22); in gx1_read_conf_reg()
35 val = inb(0x23); in gx1_read_conf_reg()
36 outb(CONFIG_CCR3, 0x22); in gx1_read_conf_reg()
37 outb(ccr3, 0x23); in gx1_read_conf_reg()
46 return (gx1_read_conf_reg(CONFIG_GCR) & 0x03) << 30; in gx1_gx_base()
54 unsigned dram_size = 0, fb_base; in gx1_frame_buffer_size()
[all …]

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