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/linux-6.15/arch/mips/ath25/
Dar5312_regs.h17 #define AR5312_IRQ_WLAN0 (MIPS_CPU_IRQ_BASE + 2) /* C0_CAUSE: 0x0400 */
18 #define AR5312_IRQ_ENET0 (MIPS_CPU_IRQ_BASE + 3) /* C0_CAUSE: 0x0800 */
19 #define AR5312_IRQ_ENET1 (MIPS_CPU_IRQ_BASE + 4) /* C0_CAUSE: 0x1000 */
20 #define AR5312_IRQ_WLAN1 (MIPS_CPU_IRQ_BASE + 5) /* C0_CAUSE: 0x2000 */
21 #define AR5312_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6) /* C0_CAUSE: 0x4000 */
26 #define AR5312_MISC_IRQ_TIMER 0
41 * actually use 1 of them (i.e. Only MAC 0 is actually connected to an enet
44 #define AR5312_WLAN0_BASE 0x18000000
45 #define AR5312_ENET0_BASE 0x18100000
46 #define AR5312_ENET1_BASE 0x18200000
[all …]
/linux-6.15/drivers/net/wireless/broadcom/b43legacy/
Dphy.h25 B43legacy_ANTENNA0, /* Antenna 0 */
26 B43legacy_ANTENNA1, /* Antenna 0 */
28 B43legacy_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */
44 #define B43legacy_PHYROUTE_OFDM_GPHY 0x400
45 #define B43legacy_PHYROUTE_EXT_GPHY 0x800
56 #define B43legacy_PHY_CLASSCTL B43legacy_PHY_EXTG(0x02) /* Classify control */
57 #define B43legacy_PHY_GTABCTL B43legacy_PHY_EXTG(0x03) /* G-PHY table control (see below) */
58 #define B43legacy_PHY_GTABOFF 0x03FF /* G-PHY table offset (see below) */
59 #define B43legacy_PHY_GTABNR 0xFC00 /* G-PHY table number (see below) */
61 #define B43legacy_PHY_GTABDATA B43legacy_PHY_EXTG(0x04) /* G-PHY table data */
[all …]
/linux-6.15/drivers/bus/
Domap_l3_smx.h14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/linux-6.15/arch/m68k/include/asm/
Dmcfdma.h21 #define MCFDMA_SAR 0x00 /* DMA source address (r/w) */
22 #define MCFDMA_DAR 0x01 /* DMA destination adr (r/w) */
24 #define MCFDMA_DCR 0x04 /* DMA control reg (r/w) */
25 #define MCFDMA_BCR 0x06 /* DMA byte count reg (r/w) */
27 #define MCFDMA_DSR 0x10 /* DMA status reg (r/w) */
28 #define MCFDMA_DIVR 0x14 /* DMA interrupt vec (r/w) */
33 #define MCFDMA_DCR_INT 0x8000 /* Enable completion irq */
34 #define MCFDMA_DCR_EEXT 0x4000 /* Enable external DMA req */
35 #define MCFDMA_DCR_CS 0x2000 /* Enable cycle steal */
36 #define MCFDMA_DCR_AA 0x1000 /* Enable auto alignment */
[all …]
/linux-6.15/arch/arm/include/asm/
Dcputype.h5 #define CPUID_ID 0
14 #define CPUID_EXT_PFR0 0x40
15 #define CPUID_EXT_PFR1 0x44
16 #define CPUID_EXT_DFR0 0x48
17 #define CPUID_EXT_AFR0 0x4c
18 #define CPUID_EXT_MMFR0 0x50
19 #define CPUID_EXT_MMFR1 0x54
20 #define CPUID_EXT_MMFR2 0x58
21 #define CPUID_EXT_MMFR3 0x5c
22 #define CPUID_EXT_ISAR0 0x60
[all …]
/linux-6.15/arch/arm/boot/dts/broadcom/
Dbcm63138.dtsi23 #size-cells = <0>;
25 cpu@0 {
29 reg = <0>;
46 #clock-cells = <0>;
54 #clock-cells = <0>;
63 #clock-cells = <0>;
72 #clock-cells = <0>;
80 ranges = <0 0x80000000 0x784000>;
86 reg = <0x1d000 0x1000>;
92 interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/linux-6.15/arch/arm/boot/dts/microchip/
Dsama7d65.dtsi27 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0x0>;
41 #clock-cells = <0>;
46 #clock-cells = <0>;
58 reg = <0xe0008000 0x20>;
63 reg = <0xe0014000 0x800>;
78 reg = <0xe0018000 0x200>;
81 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
87 reg = <0xe001d000 0x30>;
[all …]
Dsama5d3_lcd.dtsi17 reg = <0xf0030000 0x2000>;
18 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
26 #size-cells = <0>;
28 port@0 {
30 #size-cells = <0>;
31 reg = <0>;
38 pinctrl-0 = <&pinctrl_lcd_pwm>;
45 pinctrl_lcd_base: lcd-base-0 {
54 pinctrl_lcd_pwm: lcd-pwm-0 {
58 pinctrl_lcd_rgb444: lcd-rgb-0 {
[all …]
/linux-6.15/drivers/parisc/
Dlasi.c29 #define LASI_VER 0xC008 /* LASI Version */
31 #define LASI_IO_CONF 0x7FFFE /* LASI primary configuration register */
32 #define LASI_IO_CONF2 0x7FFFF /* LASI secondary configuration register */
39 case 0x74: irq = 7; break; /* Centronics */ in lasi_choose_irq()
40 case 0x7B: irq = 13; break; /* Audio */ in lasi_choose_irq()
41 case 0x81: irq = 14; break; /* Lasi itself */ in lasi_choose_irq()
42 case 0x82: irq = 9; break; /* SCSI */ in lasi_choose_irq()
43 case 0x83: irq = 20; break; /* Floppy */ in lasi_choose_irq()
44 case 0x84: irq = 26; break; /* PS/2 Keyboard */ in lasi_choose_irq()
45 case 0x87: irq = 18; break; /* ISDN */ in lasi_choose_irq()
[all …]
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
Dst,stm32-pinctrl.yaml55 - description: The field mask of IRQ mux, needed if different of 0xf
62 enum: [0x1, 0x2, 0x4, 0x8, 0x100, 0x400, 0x800]
65 '^gpio@[0-9a-f]*$':
115 minimum: 0
119 "^(.+-hog(-[0-9]+)?)$":
131 '-[0-9]*$':
153 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
154 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
156 * 0 : GPIO
157 * 1 : Alternate Function 0
[all …]
/linux-6.15/drivers/media/usb/dvb-usb-v2/
Dce6230.c53 pipe = usb_sndctrlpipe(d->udev, 0); in ce6230_ctrl_msg()
56 pipe = usb_rcvctrlpipe(d->udev, 0); in ce6230_ctrl_msg()
67 if (ret < 0) in ce6230_ctrl_msg()
71 ret = 0; in ce6230_ctrl_msg()
89 int ret = 0, i = 0; in ce6230_i2c_master_xfer()
95 memset(&req, 0, sizeof(req)); in ce6230_i2c_master_xfer()
97 if (mutex_lock_interruptible(&d->i2c_mutex) < 0) in ce6230_i2c_master_xfer()
110 req.index = msg[i].buf[0]; in ce6230_i2c_master_xfer()
112 req.data = &msg[i+1].buf[0]; in ce6230_i2c_master_xfer()
130 req.index = msg[i].buf[0]; in ce6230_i2c_master_xfer()
[all …]
/linux-6.15/security/apparmor/include/
Dperms.h21 #define AA_MAY_CREATE 0x0010
22 #define AA_MAY_DELETE 0x0020
23 #define AA_MAY_OPEN 0x0040
24 #define AA_MAY_RENAME 0x0080 /* pair */
26 #define AA_MAY_SETATTR 0x0100 /* meta write */
27 #define AA_MAY_GETATTR 0x0200 /* meta read */
28 #define AA_MAY_SETCRED 0x0400 /* security cred/attr */
29 #define AA_MAY_GETCRED 0x0800
31 #define AA_MAY_CHMOD 0x1000 /* pair */
32 #define AA_MAY_CHOWN 0x2000 /* pair */
[all …]
/linux-6.15/samples/bpf/
Dsockex3_kern.c17 #define IP_MF 0x2000
18 #define IP_OFFSET 0x1FFF
109 __u32 nhoff = skb->cb[0]; in parse_ip_proto()
135 skb->cb[0] = nhoff; in parse_ip_proto()
164 return 0; in bpf_func_ip()
166 nhoff = skb->cb[0]; in bpf_func_ip()
169 return 0; in bpf_func_ip()
178 verlen = load_byte(skb, nhoff + 0/*offsetof(struct iphdr, ihl)*/); in bpf_func_ip()
179 nhoff += (verlen & 0xF) << 2; in bpf_func_ip()
181 skb->cb[0] = nhoff; in bpf_func_ip()
[all …]
/linux-6.15/drivers/net/ipa/
Dipa_uc.c39 /* Supports hardware interface version 0x2000 */
92 IPA_UC_COMMAND_NO_OP = 0x0,
93 IPA_UC_COMMAND_UPDATE_FLAGS = 0x1,
94 IPA_UC_COMMAND_DEBUG_RUN_TEST = 0x2,
95 IPA_UC_COMMAND_DEBUG_GET_INFO = 0x3,
96 IPA_UC_COMMAND_ERR_FATAL = 0x4,
97 IPA_UC_COMMAND_CLK_GATE = 0x5,
98 IPA_UC_COMMAND_CLK_UNGATE = 0x6,
99 IPA_UC_COMMAND_MEMCPY = 0x7,
100 IPA_UC_COMMAND_RESET_PIPE = 0x8,
[all …]
/linux-6.15/drivers/media/platform/qcom/venus/
Dhfi_helper.h9 #define HFI_DOMAIN_BASE_COMMON 0
11 #define HFI_DOMAIN_BASE_VDEC 0x1000000
12 #define HFI_DOMAIN_BASE_VENC 0x2000000
13 #define HFI_DOMAIN_BASE_VPE 0x3000000
15 #define HFI_VIDEO_ARCH_OX 0x1
17 #define HFI_ARCH_COMMON_OFFSET 0
18 #define HFI_ARCH_OX_OFFSET 0x200000
20 #define HFI_OX_BASE 0x1000000
22 #define HFI_CMD_START_OFFSET 0x10000
23 #define HFI_MSG_START_OFFSET 0x20000
[all …]
/linux-6.15/arch/arm/boot/dts/ti/omap/
Domap4-l4-abe.dtsi1 &l4_abe { /* 0x40100000 */
3 reg = <0x40100000 0x400>,
4 <0x40100400 0x400>;
10 ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
11 <0x49000000 0x49000000 0x100000>;
12 segment@0 { /* 0x40100000 */
18 <0x00000000 0x00000000 0x000400>, /* ap 0 */
19 <0x00000400 0x00000400 0x000400>, /* ap 1 */
20 <0x00022000 0x00022000 0x001000>, /* ap 2 */
21 <0x00023000 0x00023000 0x001000>, /* ap 3 */
[all …]
/linux-6.15/Documentation/devicetree/bindings/net/
Dqcom,ipa.yaml222 qcom,local-pid = <0>;
244 iommus = <&apps_smmu 0x440 0x0>,
245 <&apps_smmu 0x442 0x0>;
246 reg = <0x1e40000 0x7000>,
247 <0x1e47000 0x2000>,
248 <0x1e04000 0x2c000>;
255 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
266 <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
267 <&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
268 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
[all …]
/linux-6.15/arch/arm/boot/dts/marvell/
Darmada-375.dtsi36 #clock-cells = <0>;
42 #clock-cells = <0>;
49 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0>;
75 pcie-mem-aperture = <0xe0000000 0x8000000>;
76 pcie-io-aperture = <0xe8000000 0x100000>;
80 reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
85 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
86 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
[all …]
/linux-6.15/drivers/net/wireless/ralink/rt2x00/
Drt2500usb.h20 #define RF2522 0x0000
21 #define RF2523 0x0001
22 #define RF2524 0x0002
23 #define RF2525 0x0003
24 #define RF2525E 0x0005
25 #define RF5222 0x0010
43 #define CSR_REG_BASE 0x0400
44 #define CSR_REG_SIZE 0x0100
45 #define EEPROM_BASE 0x0000
46 #define EEPROM_SIZE 0x006e
[all …]
/linux-6.15/arch/arm/boot/dts/hisilicon/
Dhip04.dtsi22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
27 #size-cells = <0>;
87 CPU0: cpu@0 {
90 reg = <0>;
110 reg = <0x100>;
115 reg = <0x101>;
120 reg = <0x102>;
125 reg = <0x103>;
130 reg = <0x200>;
135 reg = <0x201>;
[all …]
/linux-6.15/Documentation/filesystems/ext4/
Dsuper.rst12 number is either 0 or a power of 3, 5, or 7. If the flag is not set,
29 * - 0x0
33 * - 0x4
37 * - 0x8
41 * - 0xC
45 * - 0x10
49 * - 0x14
53 is typically 0 for all other block sizes.
54 * - 0x18
58 * - 0x1C
[all …]
/linux-6.15/arch/arm64/boot/dts/marvell/
Darmada-cp11x.dtsi29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
58 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60 CP11X_LABEL(ethernet): ethernet@0 {
62 #size-cells = <0>;
64 reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
74 CP11X_LABEL(eth0): ethernet-port@0 {
88 reg = <0>;
89 port-id = <0>; /* For backward compatibility. */
[all …]
/linux-6.15/include/linux/mtd/
Donenand.h157 #define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0)
177 #define ONENAND_IS_2PLANE(this) (0)
187 #define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
189 #define ONENAND_BADBLOCK_POS 0
194 #define ONENAND_HAS_CONT_LOCK (0x0001)
195 #define ONENAND_HAS_UNLOCK_ALL (0x0002)
196 #define ONENAND_HAS_2PLANE (0x0004)
197 #define ONENAND_HAS_4KB_PAGE (0x0008)
198 #define ONENAND_HAS_CACHE_PROGRAM (0x0010)
199 #define ONENAND_HAS_NOP_1 (0x0020)
[all …]
/linux-6.15/drivers/tty/serial/jsm/
Djsm.h27 DBG_INIT = 0x01,
28 DBG_BASIC = 0x02,
29 DBG_CORE = 0x04,
30 DBG_OPEN = 0x08,
31 DBG_CLOSE = 0x10,
32 DBG_READ = 0x20,
33 DBG_WRITE = 0x40,
34 DBG_IOCTL = 0x80,
35 DBG_PROC = 0x100,
36 DBG_PARAM = 0x200,
[all …]
/linux-6.15/fs/udf/
Decma_167.h56 #define CHARSPEC_TYPE_CS0 0x00 /* (1/7.2.2) */
57 #define CHARSPEC_TYPE_CS1 0x01 /* (1/7.2.3) */
58 #define CHARSPEC_TYPE_CS2 0x02 /* (1/7.2.4) */
59 #define CHARSPEC_TYPE_CS3 0x03 /* (1/7.2.5) */
60 #define CHARSPEC_TYPE_CS4 0x04 /* (1/7.2.6) */
61 #define CHARSPEC_TYPE_CS5 0x05 /* (1/7.2.7) */
62 #define CHARSPEC_TYPE_CS6 0x06 /* (1/7.2.8) */
63 #define CHARSPEC_TYPE_CS7 0x07 /* (1/7.2.9) */
64 #define CHARSPEC_TYPE_CS8 0x08 /* (1/7.2.10) */
84 #define TIMESTAMP_TYPE_MASK 0xF000
[all …]

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